|Datasheet||Download MCD221FU datasheet
This technical summary provides a brief description of the MCD221 CDInterface and Audio Processor. A complete data sheet for the MCD221 is available and can be ordered from your local Motorola sales office. The order number is MCD221/D. The MCD221 has two main functions. The first is to form an interface between a CD drive unit and a CDi or PhotoCD player. The connection to the drive is designed for both applications and can be either a Digital Out (EBU standard) interface, an I2S plus subcode interface. The host interface can be either a 68000 interface for CDi players, or a serial (SPI) interface for PhotoCD. The second function of the is to decode ADPCM (CDi base case) audio, to perform audio mixing functions as specified in the Green Book, and to be able to add external audio to the base case audio. The MCD221 can also be used for handling the ADPCM decoding for PhotoCD. The main features of the MCD221 are as follows: Accepts Audio Inputs in I2S Format (MPEG1) for Mixing with CIAP Internal Audio Output Can Be Either I2S or SONY Format Data Input Rate Can to 2 Times Normal Speed Can Connect to a Host via Either 68K or Serial Interface 80Pin Quad Flat Pack (QFP)
NOTE: Supply of this VideoCD IC does not convey an implied license under any patent right to use this IC in any VideoCD application. CDi is a registered trademark of Philips Consumer Electronics.DAOUT CLOUT WSOUT XDAI XWSI XCLI SUBCODE/EBU EFI CLI WSI DAI VSS V DD
Mnemonic 0] CS R/W DTACK Type Name and Function System Address Bus. The address must be stable before CS is asserted. Active HIGH. System Data Bus. The data lines must be stable when CS is active during a write and before DTACK is asserted during a read. Tristate. Chip Select. Used to access the CIAP internal registers and buffers. Active LOW. Read/Write. Indicates the direction of the data transfer. When LOW, the transfer is to the CIAP. Data Transfer Acknowledge. Active LOW. During normal host access, DTACK is an output indicating that data has been put on (read cycles) or read from (write cycles) the data bus. (Active pullup.) During DMA, DTACK is an input indicating that the memory has put data on the data bus. Interrupt. Released when the interrupt status register is read. Active LOW. Interrupt Acknowledge. Active LOW. DMA Request. Active LOW. Acknowledge. DMA handshake signal indicating that the bus is available for data transfer. Active LOW. Ready. DMA handshake signal indicating that the CIAP has completed the data transfer. Tristate. Active LOW. When released by the CIAP, the output is forced high for a few nanoseconds before it is made tristate. Done. Indicates the last transfer of a DMA burst. Active LOW.
Mnemonic Type I Name and Function SCLK MOSI MISO Serial Clock. Serial Data. Master out, slave in. Serial Data. Master in, slave out. Serial Interface MODE bits. 00 = Write selected register 01 = Read selected register 10 = Write address = No action MODE_0, MODE_1 Mnemonic Type Name and Function Serial Bit Clock Input. Word Clock Input. Serial Data Input. Error Flag Input. WSI DAI EFI SUBCODE/EBU Subcode (P... W) serial data input or EBU input for both main channel and subchannel. Type I Name and Function XCLI External Audio Serial Bit Clock Input. When not used, the pin must be connected to VCC or VSS. External Audio Word Clock Input. When not used, the pin must be connected to VCC or VSS. XWSI XDAI External Audio Data Input. When not used, the pin must be connected to VCC or VSS.
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