|Category||Timing Circuits => Prescalers/Dividers->RF|
|Description||SO-8 SMT 0.5-12GHz High Eff. GAAS HBT Prescalers|
|Company||Agilent Technologies, Inc.|
|Datasheet||Download HMMC-3122 datasheet
Package Type: Package Dimensions: Package Thickness: Lead Pitch: Lead Width:
8-lead SSOP Plastic 3.9 mm Typ. 1.55 mm Typ. 1.25 mm Nom. 0.42 mm Nom.
Wide Frequency Range: 0.212 GHz High Input Power Sensitivity: On-chip pre- and post-amps to +10 dBm (18 GHz) to +8 dBm (810 GHz) to +2 dBm (1012 GHz) Pout: 0 dBm (0.5 Vp-p) Low Phase Noise: -153 dBc/Hz @ 100 kHz Offset or Single Supply Bias Operation Wide Bias Supply Range: to 6.5 volt operating range Differential I/0 with on-chip 50 matchingDescription
The is a packaged GaAs HBT MMIC prescaler which offers to 12 GHz frequency translation for use in communications and EW systems incorporating high-frequency PLL oscillator circuits and signal-path down conversion applications. The prescaler provides a large input power sensitivity window and low phase noise.Symbol VCC VEE |VCC VEE| VLogic Pin(CW) VRFin TBS Tst Tmax
Parameters/Conditions Bias Supply Voltage Bias Supply Voltage Bias Supply Delta Logic Threshold Voltage CW RF Input Power DC Input Voltage RFin or RFin Ports) Backside Operating Temp Storage Temperature Maximum Assembly Temp. (60 seconds max.)
Operation in excess of any parameter limit (except T BS) may cause permanent damage to the device. MTTF >1×106 hours BS <85°C. Operation in excess of maximum operating temperature (TBS) will degrade MTTF.
Min. 4.5 34 Typ. 5.0 40 VCC - 1.45 VCC -1.32 VCC -1.25 Max. 6.5 46 Units volts mA volts VCC - VEE Operating bias supply difference |ICC| or |IEE| Bias supply current VRFin(q) Quiescent DC voltage appearing at all RF ports VRFout(q) Nominal ECL Logic Level VLogic (VLogic contact self-bias voltage, generated on-chip)
Prescaler will operate over full specified supply voltage range. CC or VEE not to exceed limits specified in Absolute Maximum Ratings section.
Symbol in(max) in(min) Self-Osc. Parameters/Conditions Maximum input frequency of operation Minimum input frequency of operation (Pin = -10 dBm) Output Self-Oscillation Frequency @ DC, (Square-wave input) = 500 MHz, (Sine-wave input) to 8 GHz to 10 GHz to 12 GHz Small-Signal Input/Output Return Loss (@in< 10 GHz) Small-Signal Reverse Isolation (@in<10 GHz) SSB Phase noise Pin = 0 dBm, 100kHz offset from a out = 1.2 GHz Carrier) Input signal time variation @ zero-crossing (in = 10 GHz, Pin = -10 dBm) Output transition time to 90% rise/fall time) @ out < 1 GHz @ out = 2.5 GHz @ out = 3.0 GHz @ out <1 GHz @ out = 2.5 GHz @ out = 3.0 GHz out power level appearing at RFin or RFin in 10 GHz, Unused RFout or RFout unterminated) out power level appearing at RFin or RFin = 10 GHz, Both RFout & RFout terminated) Power level of in appearing at RFout or RFout = 12 GHz, Pin = 0 dBm, Referred to Pin(in)) Second harmonic distortion output level out = 3.0 GHz, Referred to Pout(out))
For sine-wave input signal. Prescaler will operate down to D.C. for square-wave input signal. Minimum divide frequency limited by input slew-rate. Prescaler can exhibit this output signal under bias in the absence an RF input signal. This condition can be eliminated by use of the Input DC offset technique described on page 3.  Fundamental of output square wave's Fourier Series. Square wave amplitude calculated from P. outApplications
The HMMC-3122 is designed for use in high frequency communications, microwave instrumentation, and EW radar systems where low phase-noise PLL control circuitry or broad-band frequency translation is required.
For positive supply operation, VCC pins are nominally biased at any voltage in the to +6.5 volt range with pin 8 (VEE) grounded. For negative bias operation VCC pins are typically grounded and a negative voltage between to 6.5 volts is applied to pin 8 (VEE).
an RF signal with sufficient signal to noise ratio is present at the RF input lead, the prescaler will operate and provide a divided output equal the input frequency divided by the divide modulus. Under certain "ideal" conditions where the input is well matched at the right input frequency, the component may "self-oscillate", especially under small signal input powers or with only noise present at the input This "self-oscillation" will produce a undesired output signal also known as a false trigger. To prevent false triggers or self-oscillation conditions, apply mV DC offset voltage between the RFin and RFin ports. This prevents noise or spurious low level signals from triggering the divider. Adding a 10K resistor between the unused RF input to a contact point at the VEE potential will result in an offset of 25mV between the RF inputs. Note however, that the input sensitivity will be reduced slightly due to the presence of this offset.
The device is designed to operate when driven with either a singleended or differential sinusoidal input signal over a 200 MHz to 12 GHz bandwidth. Below 200 MHz the prescaler input is "slew-rate" limited, requiring fast rising and falling edge speeds to properly divide. The device will operate at frequencies down to DC when driven with a square-wave. Due to the presence of an off-chip RF-bypass capacitor inside the package (connected to the VCC contact on the device), and the unique design of the device itself, the component may be biased from either a single positive or single negative supply bias. The backside of the package is not DC connected to any DC bias point on the device.
All RF ports are DC connected on-chip to the VCC contact through on-chip 50 resistors. Under any bias conditions where VCC is not DC grounded the RF ports should be AC coupled via series capacitors mounted on the PC-board at each RF port. Only under bias conditions where VCC is DC grounded (as is typical for negative bias supply operation) may the RF ports be direct coupled to adjacent circuitry or in some cases, such as level shifting to subsequent stages. In the latter case the package heat sink may be "floated" and bias applied as the difference between VCC and VEE.
|Some Part number from the same manufacture Agilent Technologies, Inc.|
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