|Company||Infineon Technologies Corporation|
|Datasheet||Download V23806-A3-C201 datasheet
APPLICATIONS ATM switches/bridges/routers Fast Ethernet, FDDI High speed computer links Local area networks Switching systems Absolute Maximum Ratings Exceeding any one of these values may destroy the device immediately. FEATURES Compliant with Fast Ethernet, FDDI, Fibre Channel, ATM/SONET/SDH standards Compact integrated transceiver unit with duplex SC receptacle Single power supply with 5.5 V range Extremely low power consumption 3.3 V PECL differential inputs and outputs System optimized for 62.5/50 µm graded index fiber Industry standard multisource footprint Very low profile for high slot density Wave solderable and washable with process plug inserted Testboard available UL-94 V-0 certified ESD Class 1 per MIL-STD 883D Method 3015.7 (March 89) Compliant with FCC (Class B) and EN 55022 For distances km on multimode fiber Supply Voltage (VCCVEE)....................................... 7 V Data Input Levels (PECL) (VIN)..................................... VEEVCC Differential Data Input Voltage............................................... 3 V Operating Ambient Temperature (TAMB)......... to 85°C Storage Ambient Temperature............................ to 85°C Soldering Conditions, Temp/Time (TSOLD/tSOLD) (MIL -STD 883C, Method °C/10 s ESD Resistance (all pins to VEE, human body).................. 1.5 kV Output Current (IO)........................................................... 50 mA
DESCRIPTION This data sheet describes the Infineon Fast Ethernet/FDDI/ATM transceiver--part of Infineon Multistandard Transceiver Family. It is fully compliant with the Asynchronous Transfer Mode (ATM) OC-3 standard, the Fiber Distributed Data Interface (FDDI) Low Cost Fiber Physical Layer Medium Dependent (LCFPMD) draft standard(1), and the FDDI PMD standard(2). ATM was developed because of the need for multimedia applications, including real time transmission. The data rate is scalable and the ATM protocol is the basis of the broadband public networks being standardized in the International Telegraph and Telephone Consultative Committee (CCITT). ATM can also be used in local private applications. FDDI is a Dual Token Ring standard developed in the U.S. by the Accredited National Standards Committee (ANSC) X3T9, within the Technical Committee It is applied to the local area networks of stations, transferring data at 100 Mbits/s with a 125 MBaud transmission rate. LCF FDDI is specially developed for short distance applications 500 m (fiber-to-the-desk) as compared 2 km for backbone applications. Fast Ethernet was developed because of the higher bandwidth requirement in local area networking. It is based on the proven effectiveness of millions of installed Ethernet systems. The Infineon multimode transceiver is a single unit comprised of a transmitter, a receiver, and an SC receptacle. This design frees the customer from many alignment and PC board layout concerns. The modules are designed for low cost applications. The inputs/outputs are PECL compatible and the unit operates from 5.5 V power supply. As an option, the data output stages can be switched to static levels during absence of light, as indicated by the Signal Detect function. It can be directly interfaced with available chipsets.
Notes 1. FDDI Token Ring, Low Cost Fiber Physical Layer Medium Dependent (LCF-PMD) ANSI / 92 LCF-PMD / Proposed Rev. 1.3, September 1, 1992. American National Standard. 2. FDDI Token Ring, Physical Layer Medium Dependent (PMD) ANSI X3.166-1990 American National Standard. ISO/IEC 9314-3: 1990.
TECHNICAL DATA The electro-optical characteristics described in the following tables are valid only for use under the recommended operating conditions. Recommended Operating Conditions
Parameter Ambient Temperature Power Supply Voltage Supply Current 3.3 V Supply Current 5 V(1) Transmitter Data Input High Voltage Data Input Low Voltage Threshold Voltage Input Data Rise/Fall, 20%80% Data High Time(2) Receiver Output Current Input Duty Cycle Distortion Input Data Dependent Jitter Input Random Jitter Input Center Wavelength Electrical Output Load(3)
Notes 1. For VCCVEE (min., max.). 50% duty cycle. The supply current (ICC2+ICC3) does not include the load drive current (Icc1). Add max. 45 mA for the three outputs. Load is 50 into VCC 2. To maintain good LED reliability, the device should not be held in the ON state for more than the specified time. Normal operation should be done with 50% duty cycle. 3. To achieve proper PECL output levels the 50 termination should be done to VCC 2 V. For correct termination see the application notes.
Feature Electromagnetic Interference (EMI) Immunity: Electrostatic Discharge Standard FCC Class EN 55022 Class B CISPR EN 61000-4-2 IEC 61000-4-2 Comments Noise frequency range:30 MHz to 40 GHz Discharges ± 15kV with an air discharge probe on the receptacle cause no damage. With a field strength of 10 V/m rms, noise frequency ranges from 10 MHz to 1 GHz Class 1Immunity: Radio Frequency Electromagnetic Field Eye Safety
Transmitter Data Rate Launched Power (Average) into 62.5 µm Fiber for C8C10(1, 2) Launched Power (Average) into 62.5 µm Fiber for C8C11(1, 2) Center 3) C Spectral Width (FWHM)(2, 4) Output Rise/Fall Time, 10%90%(2, 5) Temperature Coefficient of Optical Output Power Extinction Ratio (Dynamic)(2, 6) Optical Power Low(7) Overshoot Duty Cycle Distortion(8, 9) Data Dependent Jitter(8, 10) Random Jitter(8, 11)
Notes 1. Measured at the end of 5 meters of 62.5/125/0.275 graded index fiber using calibrated power meter and a precision test ferrule. Cladding modes are removed. Values valid for EOL and worst-case temperature. 2. The input data pattern a 12.5 MHz square wave pattern. 3. Center wavelength is defined as the midpoint between the two 50% levels of the optical spectrum of the LED. 4. Spectral width (full width, half max) is defined as the difference between 50% levels of the optical spectrum of the LED. to 90% levels. Measured using the 12.5 MHz square wave pattern with an optoelectronic measurement system (detector and oscilloscope) having 3 dB bandwidth ranging from less than 0.1 MHz to more than 750 MHz. 6. Extinction Ratio is defined as PL/PH x 100%. Measurement system as in Note 5. 7. Optical Power Low is the output power level when a steady state low data pattern (FDDI Quiet Line state) is used to drive the transmitter. Value valid <1 ms after input low. 8. Test method as for FDDI-PMD. Jitter values are peak-to-peak. 9. Duty Cycle Distortion is defined as 0.5 [(width of wider state) minus (width of narrower state)]. It is measured with stream of Idle Symbols (62.5 MHz square wave). 10.Measured with the same pattern as for FDDI-PMD. 11. Measured with the Halt Line state (12.5 MHz square wave).
Max. 170 14 Units MBaud dBm Receiver Data Rate Sensitivity Average Power)(2) Sensitivity (Average Power) Center(3) Saturation (Average PSAT Power)(3) 14 Symbol DR PIN Min. ns Typ. Max. 170 31 Units MBaud dBm
Duty Cycle Distortion(4, 5) Deterministic Jitter(5, 6) Random Jitter(5, 7) Signal Detect Assert Level(8) Signal Detect Deassert Level(9) Signal Detect Hysteresis Output Low Voltage(10) Output High Voltage(10) Output Data Rise/Fall Time, 20%80% Output SD Rise/Fall Time, 20%80%
1. Pattern: Manchester coding / NRZI (no scrambling) 2. For a bit error rate (BER) of less than 1x10E12 over a receiver eye opening of least 1.5 ns. Measured with a 2231 PRBS at 155 MBd. 3. For a BER of less than 1x10E-12. Measured in the center of the eye opening with a 223-1 PRBS at 155 MBd. 4. Measured at an average optical power level of 20 dBm with a 62.5 MHz square wave. 5. All jitter values are peak-to-peak. RX output jitter requirements are not considered in the ATM standard draft. In general the same requirements as for FDDI are met. 6. Measured at an average optical power level of 20 dBm. 7. Measured at 33 dBm average power. 8. An increase in optical power through the specified level will cause the SIGNAL detect output to switch from a Low state to a High state. 9. A decrease in optical power through the specified level will cause the SIGNAL detect output to switch from a High state to a Low state. 10. PECL compatible. Load is 50 into VCC 2 V. Measured under DC conditions. For dynamic measurements a tolerance 50 mV should be added for VCC=5 V.
|Related products with the same datasheet|
|Some Part number from the same manufacture Infineon Technologies Corporation|
|V23806-A3-C202 Fddi PMD|
|V23806-A3-T2 MM 125 MBD Fddi Transceiver|
|V23806-A34-C2 Single Mode Fddi 1x9 Transceiver With SC Receptacle|
|V23806-A7-C1 MM 266 MBD FC Transceiver|
|V23806-A8-C1 Multimode 1300 NM Led Fast Ethernet/fddi/atm 10 DB 155 MBD 1x9 Transceiver|
|V23806-A8-C101 Fddi PMD|
|V23806-A8-C102 Multimode 1300 NM Led Fast Ethernet/fddi/atm 10 DB 155 MBD Transceiver With ISOlated Stud Pins|
|V23806-A8-C13 Fddi PMD|
|V23806-A8-T1 MM 125 MBD Fddi Transceiver|
|V23806-A84-C1 SM 155 MBD Atm/sdh/sonet Transceiver|
|V23806-A84-C2 Single Mode Fddi 1x9 Transceiver With SC Receptacle|
|V23806-A84-C20 Single Mode 155 MBD A(tm) 1x9transceiver With ISOlated Stud Pins And High Sensitivity|
|V23806-A84-C3 Single Mode 155mbd Atm 1x9 Transceiver Extended Temperature Range (-40 Degrees C to 85 Degrees c)|
|V23806-A84-C42 Single Mode 155 MBD A(tm) Long Haul 1x9transceiver|
|V23806-A84-C42xx SM 155 MBD Atm/sdh/sonet Transceiver|
|V23806-A84-C51 SM 622 MBD Atm/sdh/sonet Transceiver|
|V23806-A84-C6 5v Single Mode 155mbd Atm 2x9 Transceiver With RX Monitor|
|V23806-A84-T2 Single Mode 155 MBD A(tm) 1x9 Transceiver With ST (r) Connector|
BCV26E6433 : PNP Silicon Darlington Transistor
SABC515C-8EM : 8 Bit Microcontroller With On-chip Full-can Module
HYB25D256163CE-4.0 : Double Data Rate Graphics DRAM The 16M x 16 Double Data Rate Graphics DRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quad-bank DRAM.
BGA 628L7 E6327 : RF Amplifier RF SILICON MMIC PG-TSLP-7 The Infineon BGA628L7 wide band low noise amplifier features extremely small form factor with a height of 0.32mm maximum and a size of 1.4 x 1.26 mm². The compact size together with the low external part count makes the Infineon BGA628L7 LNA ideal for size-critical modules for WLAN, mobil
IPD70N03S4L-04 : Fet - Single Discrete Semiconductor Product 70A 30V 68W Surface Mount; MOSFET N-CH 30V 70A TO252-3 Specifications: Mounting Type: Surface Mount ; FET Type: MOSFET N-Channel, Metal Oxide ; Drain to Source Voltage (Vdss): 30V ; Current - Continuous Drain (Id) @ 25° C: 70A ; Rds On (Max) @ Id, Vgs: 4.3 mOhm @ 70A, 10V ; Input Capacitance (Ciss) @ Vds: 3300pF @ 25V ; Power - Max: 68W ; Packaging: Tap
SAF-XC864L-1FRI3V3AA : 8-BIT, FLASH, 25.6 MHz, MICROCONTROLLER, PDSO16 Specifications: Life Cycle Stage: ACTIVE ; Clock Speed: 48 MHz ; ROM Type: Flash ; Supply Voltage: 3 to 5.5 volts ; I/O Ports: 13 ; Package Type: TSSOP, Other, GREEN, PLASTIC, TSSOP-16 ; Operating Range: Industrial ; Pin Count: 16 ; Operating Temperature: -40 to 85 C (-40 to 185 F) ; Features: PWM
SAK-XC2232N-8F80L : 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PDSO38 Specifications: Life Cycle Stage: ACTIVE ; Clock Speed: 40 MHz ; ROM Type: Flash ; Supply Voltage: 3 to 5.5 volts ; I/O Ports: 28 ; Package Type: TSSOP, Other, 0.50 MM PITCH, GREEN, PLASTIC, TSSOP-38 ; Operating Range: Auto ; Pin Count: 38 ; Operating Temperature: -40 to 125 C (-40 to 257 F) ; Featu