Details, datasheet, quote on part number: IDT7006S17JB
PartIDT7006S17JB
Category
DescriptionHigh-speed 16k X 8 Dual-port Static RAM
CompanyIntegrated Device Technology, Inc.
DatasheetDownload IDT7006S17JB datasheet
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Features, Applications

True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed access Military: 20/25/35/55/70ns (max.) Commercial: 15/17/20/25/35/55ns (max.) Low-power operation IDT7006S Active: 750mW (typ.) Standby: 5mW (typ.) IDT7006L Active: 750mW (typ.) Standby: 1mW (typ.) IDT7006 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave Busy and Interrupt Flags

On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port Devices are capable of withstanding greater than 2001V electrostatic discharge Battery backup operation--2V data retention TTL-compatible, single 5V (10%) power supply Available a 68-pin PGA, a 68-pin quad flatpack, a 68pin PLCC, and a 64-pin TQFP Industrial temperature range +85C) is available, tested to military electrical specifications

The is a high-speed x 8 Dual-Port Static RAM. The IDT7006 is designed to be used as a stand-alone Dual-Port RAM as a combination MASTER/SLAVE DualPort RAM for 16-bit-or-more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach 16-bit or wider

NOTES: 1. (MASTER): BUSY is output; (SLAVE): BUSY is input. 2. BUSY outputs and INT outputs are non-tri-stated push-pull.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

1996 Integrated Device Technology, Inc. For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.

memory system applications results in full-speed, error-free operation without the need for additional discrete logic. This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 750mW of power.

Low-power (L) versions offer battery backup data retention capability with typical power consumption of 500W from a 2V battery. The IDT7006 is packaged in a ceramic 68-pin PGA, a 68pin quad flatpack, a 68-pin PLCC, and a 64-pin TQFP (thin plastic quad flatpack). Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.


NOTES: 1. All Vcc pins must be connected to the power supply. 2. All GND pins must be connected to the ground supply. 3. This text does not indicate orientation of the actual part-marking.


NOTES: 1. All VCC pins must be connected to power supply. 2. All GND pins must be connected to ground supply. 3. This text does not indicate orientation of the actual part-marking.

Left Port R/WL Right Port Names Chip Enable Read/Write Enable Output Enable Address Data Input/Output Semaphore Enable Interrupt Flag Busy Flag Master or Slave Select Power Ground


 

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