Details, datasheet, quote on part number: DS89C420-QCL
DescriptionUltra High Speed Microcontroller
CompanyMaxim Integrated Products
DatasheetDownload DS89C420-QCL datasheet
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Features, Applications

The DS89C420 offers the highest performance available in 8051-compatible microcontrollers. It features a redesigned processor core that executes every 8051 instruction (depending on the instruction type) to 12 times faster than the original for the same crystal speed. Typical applications see a speed improvement of 10 times using the same code and crystal. The DS89C420 offers a maximum crystal speed of 33MHz, achieving execution rates to 33 million instructions per second (MIPS).


80C52 Compatible 8051 Pin- and Instruction-Set Compatible Four Bidirectional I/O Ports Three 16-Bit Timer Counters 256 Bytes Scratchpad RAM On-Chip Memory 16kB Flash Memory In-System Programmable through Serial Port 1kB SRAM for MOVX ROMSIZE Feature Selects Internal Program Memory Size from to 16k Allows Access to Entire External Memory Map Dynamically Adjustable by Software High-speed architecture 1 clock-per-machine cycle to 33MHz operation Single-cycle instruction in 30ns Optional variable length MOVX to access fast/slow peripherals Dual data pointers with auto increment/decrement and toggle select Supports four paged modes Power Management Mode Programmable clock divider Automatic hardware and software exit Two full-duplex serial ports Programmable watchdog timer 13 interrupt sources (six external) Five levels of interrupt priority Power-fail reset Early warning power-fail interrupt


Data Logging Vending Automotive Test Equipment Motor Control Magstripe Reader/Scanner Consumer Electronics Gaming Equipment Appliances (Washers, Microwaves, etc.) Telephones HVAC Building Security and Door Access Control Building Energy Control and Management Uninterruptible Power Supplies Programmable Logic Controllers Industrial Control and Automation


Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here:

Voltage Range on Any Pin Relative to Ground Voltage Range on VCC Relative to Ground Operating Temperature Range Storage Temperature Range Soldering Temperature -0.3V to (VCC to +125C See IPC/JEDEC J-STD-020A

Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect device reliability.

(VCC to +85C.) (Note 1) PARAMETER SYMBOL Supply Voltage VCC Power-Fail Warning Reset Trip Point Supply Current Active Mode (Note 3) Supply Current Idle Mode (Note 4) Supply Current Stop Mode, Bandgap Disabled Supply Current Stop Mode, Bandgap Enabled Input Low Level Input High Level Input High Level XTAL and RST Output Low Voltage; Port 1 and 3 at IOL = 1.6mA Output Low Voltage; Port 0 and 2, ALE, PSEN at IOL = 3.2mA Output High Voltage; Port 1, 2, and 3, ALE, PSEN at IOH = -50mA Output High Voltage; Port 1, 2, and 3 at IOH = -1.5mA Output High Voltage; Port 0 and 2 in Bus Mode at IOH = -8mA Output High Voltage, RST at IOL = 0.4mA Input Low Current; Port 1, 2, and at 0.4V Transition Current from to 0; Port 1, 2, and at 2V Input Leakage Current, Port 0 in I/O Mode and EA Input Leakage Current, Port 0 in Bus Mode RST Pulldown Resistance VPFW VRST ICC IIDLE ISTOP ISPBG VIL VIH VOH3 VOH4 IIL ITL IL RRST (Note 9) (Note 11) (Note 10) (Note 11) CONDITIONS (Notes 2, 13) (Notes 2, 12) (Notes 33MHz 25MHz (Note 5) (Note 5) (Note 2) (Note 2) (Note 2) (Note 2) (Note 2) (Notes 2, 7) (Notes 2, 8) (Notes 2, 6) (Notes MIN 4.2 3.95 TYP MAX VCC + 0.3 VCC UNITS A kW

Note 1: Specifications to -40C are guaranteed by design and not production tested. Note 2: All voltages are referenced to ground. Note 3: Active current is measured with a 25MHz/33MHz clock source driving XTAL1, VCC = RST = 5.5V. All other pins disconnected. Note 4: Idle mode current measured with a 25MHz/33MHz clock source driving XTAL1, VCC = 5.5V, RST at ground. All other pins disconnected. Note 5: Stop mode measured with XTAL and RST grounded, VCC = 5.5V. All other pins disconnected. Note 6: When addressing external memory. Note 7: RST = 5.5V. This condition mimics the operation of pins in I/O mode. Note 8: During a 0-to-1 transition, a one-shot drives the ports hard for two clock cycles. This measurement reflects a port pin in transition mode. Note 9: Ports 1, 2, and 3 source transition current when being pulled down externally. The current reaches its maximum at approximately 2V. Note 10: This port is a weak address holding latch in bus mode. Peak current occurs near the input transition point of the holding latch at approximately 2V. Note 11: RST = 5.5V. Port 0 floating during reset and when in the logic-high state during I/O mode. Note 12: While the specifications for VPFW and VRST overlap, the design of the hardware makes it such that this is not possible. Within the ranges given, there is a guaranteed separation between these two voltages. Note 13: The user should note that this part is tested and guaranteed to operate down 4.5V (10%) and that VRST (min) is specified below that point. This indicates that there is a range of voltages [VMIN to VRST (min)] where the processor's operation is not guaranteed, but the reset trip point has not been reached. This should not be an issue in most applications, but should be considered when proper operation must be maintained at all times. For these applications, it may be desirable to use a more accurate external reset. Note 14: Guaranteed by design.


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