Details, datasheet, quote on part number: M6MGB160S2BVP
Description16,777,216-bit (1048,576-word BY 16-bit) CMOS 3.3V-only, Block Erase Flash Memory
CompanyMitsubishi Electronics America, Inc.
DatasheetDownload M6MGB160S2BVP datasheet
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Features, Applications
3.3V-ONLY FLASH MEMORY BY 8-BIT) CMOS SRAM Stacked-MCP (Multi Chip Package)

DESCRIPTION FEATURES The MITSUBISHI is a Stacked Multi Access time Chip Package (S-MCP) that contents 16M-bits flash memory Flash Memory 90ns (Max.) and 2M-bits Static RAM a 48-pin TSOP (TYPE-I). SRAM 85ns (Max.) Supply voltage 3.6V 16M-bits Flash memory a 2097152 bytes /1048576 words, Ambient temperature 3.3V-only, and high performance non-volatile memory W version ~ 85°C fabricated by CMOS technology for the peripheral circuit Package : 48-pin TSOP (Type-I) , 0.4mm lead pitch and DINOR(DIvided bit-line NOR) architecture for the memory cell. 2M-bits SRAM a 262144 bytes / 131072 words APPLICATION unsynchronous SRAM fabricated by silicon-gate CMOS technology. Mobile communication products M6MGB/T160S2BVP is suitable for the application of the mobile-communication-system to reduce both the mount space and weight.


F-VCC S-VCC GND A17-A19 DQ0-DQ15 F-CE# S-CE OE# WE# F-WP# F-RP# F-RY/BY# BYTE# :Vcc for Flash NC:Non Connection :Vcc for SRAM :GND for Flash/SRAM :Flash/SRAM common Address :Address for Flash :Data I/O :Flash Chip Enable :SRAM Chip Enable :Flash/SRAM Output Enable :Flash/SRAM Write Enable :Flash Write Protect :Flash Reset Power Down :Flash Ready /Busy :Flash/SRAM Byte Enable

3.3V-ONLY FLASH MEMORY BY 8-BIT) CMOS SRAM Stacked-MCP (Multi Chip Package)

Parameter Block7 Parameter Block6 Parameter Block5 Parameter Block4 Parameter Block3 Parameter Block2 Parameter Block1 Boot Block


3.3V-ONLY FLASH MEMORY BY 8-BIT) CMOS SRAM Stacked-MCP (Multi Chip Package)

The Flash Memory is 3.3V-only high speed 16,777,216-bit CMOS boot block Flash Memories with alternating BGO (Back Ground Operation) feature. The BGO feature of the device allows Program or Erase operations to be performed in one bank while the device simultaneously allows Read operations to be performed on the other bank. This BGO feature is suitable for mobile and personal computing, and communication products. The Flash Memory M6MGB/T160S2BVP is fabricated by CMOS technology for the peripheral circuits and DINOR(Divided bit line NOR) architecture for the memory cells.


Boot Block M6MGB160S2BVP........................ Bottom Boot M6MGT160S2BVP........................ Top Boot Other Functions Soft Ware Command Control Selective Block Lock Erase Suspend/Resume Program Suspend/Resume Status Register Read Alternating Back Ground Program/Erase Operation Between Bank(I) and Bank(II)

Power Dissipation................................. 54 mW (Max. at 5MHz) Read (After Automatic Power saving).......... 0.33mW (typ.) Program/Erase.................................126 mW (Max.)................................. 0.33mW (typ.) Standby Deep power down mode....................... 0.33mW (typ.) Auto program for Bank(I)................................. 4ms (typ.) Program Time Program Unit.........................1word/1byte (Byte Program) (Page Program)......................... 128word/256byte Auto program for Bank(II)................................. 4ms (typ.) Program Time................................. 128word/256byte Program Unit Auto Erase................................. 40 ms (typ.) Erase time Erase Unit Bank(I) Boot Block..................... x 1.............. Parameter Block x 7...................... Bank(II) Main Block x 28 Program/Erase cycles


Some Part number from the same manufacture Mitsubishi Electronics America, Inc.
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