Details, datasheet, quote on part number: MC10165L
PartMC10165L
CategoryCommunication
Description8-input Priority Encoder
CompanyMotorola Semiconductor Products
DatasheetDownload MC10165L datasheet
Cross ref.Similar parts: 74ACT11286, CD54ACT280, CD54ACT283, CD74ACT280, CD74ACT283, SN74ALS520, SN74ALS521, SN74ALS688
Quote
Find where to buy
 
  

 

Features, Applications

The is a device designed to encode eight inputs to a binary coded output. The output code is that of the highest order input. Any input of lower priority is ignored. Each output incorporates a latch allowing synchronous operation. When the clock is low the outputs follow the inputs and latch when the clock goes high. This device is very useful for a variety of applications in checking system status in control processors, peripheral controllers, and testing systems. The input is active when high, (e.g., the three binary outputs are low when input D0 is high). The Q3 output is high when any input is high. This allows direct extension into another priority encoder when more than eight inputs are necessary. The MC10165 can also be used to develop binary codes from random logic inputs, for addressing ROMs, RAMs, or for multiplexing data.

Characteristic Power Supply Drain Current Input Current
Setup Time Hold Time Rise Time

Fall Time 80%) t3­ The same limit applies for all D type input pins. To test input currents for other D inputs, individually apply proper voltage to pin under test. 2. Output latched to low state prior to test. 3. Output latched to high state prior to test. * To preserve reliable performance, the MC10165P (plastic packaged device only) to be operated in ambient temperatures above 70°C only when 500 lfpm blown air or equivalent heat sinking is provided.


 

Related products with the same datasheet
MC10165P
Some Part number from the same manufacture Motorola Semiconductor Products
MC10165P 8-input Priority Encoder
MC10168
MC10168P Quad Latch
MC10170
MC10170L 9+2-bit Parity Generator/checker
MC10171FN Dual Binary to 1-4 Decoder (low)
MC10171L
MC10171P
MC10172
MC10172FN Dual Binary to 1-4 Decoder ( High )
MC10173FN Quad 2-input Multiplexer/ Latch
MC10173L Quad 2-input Multiplexer/latch
MC10173P
MC10174FN Quad 4 to 1 Multiplexer
MC10174L
MC10174P
MC10175FN Quint Latch
MC10175L
MC10175P
MC10176FN Hex D Master/slave Flip-flop
MC10176L
Same catergory

77305 : Atm 4-to-1 Multiplexed Fifo. Four Independent Input 128 x9 FIFO Queues Nine bit wide input FIFOs Single selectable or 18 bit output bus "UtopiaRx" or "UtopiaTx" Utopia compliant interface signaling options Separate clocks for input and output Selectable Automatic byte insertion for 8-bit Receive Utopia to 16bit Receive Utopia compliance Four 155Mbs ATM input channels can be consolidated.

AFE1224E : DSL Codecs. ti AFE1224, 2Mbps, Single PaIR Analog Front End. For most current data sheet and other product information, visit www.burr-brown.com q E1/T1 SINGLE PAIR 2B1Q q PROGRAMMABLE POWER DISSIPATION q 28-LEAD SSOP TO 2320kbps OPERATION q SCALEABLE DATA RATE q PIN COMPATIBLE WITH AFE1124 q COMPLETE ANALOG INTERFACE TO +85°C OPERATION Burr-Brown's Analog Front End minimizes the size and cost of a single pair.

ANCC-154A : PCS And Wlan Omni Antennas. Light Weight - Slim Profile Patented Printed Circuit Technology Watertight Ultrasonic and O-Ring Sealed Groundplane Independent Stainless Steel Hardware Multiple pigtail lengths, radome colors and connector options available M/A-COM's Omni antennas are vertically polarized collinear arrays utilizing a patented printed circuit technology for the radiating.

AT75C320 : Siap-ii Next-generation of High-performance Processors is Designed For Internet Appliance Applications, Built Around an ARM7TDMI Microcontroller Core And Two DSP Co-processors..

ATR3515 : 5-GHz Wlan Power Amplifier For 802.11a.

GP1R : Dual Mode Cdma/amps Baseband Interface. Dual Mode CDMA/AMPS Baseband Interface Advance Information The PLUTO baseband interface circuit is designed for use in dual mode CDMA/AMPS digital cellular telephones. In the telephone, Pluto provides the interface between the radio (RF & IF) components and the baseband digital signal processor. Pluto is part of a complete chipset solution for CDMA.

GT3200 : GT3200 Usb 2.0 PHY ic.

M57729UH : RF Power Module For 470-490MHz, 12.5V, 30W FM Mobile Radio.

M67749H : RF Power Module For 440-470MHz, 12.5V, 7W FM Portable Radio.

MCM69C432 : 16k X 64 Cam. The is a flexible content­addressable memory (CAM) that can contain 16K entries of 64 bits each. The widths of the match field and the output field are programmable, and the match time is designed be 180 ns. As a result, the MCM69C432 is well suited for datacom applications such as Virtual Path Identifier/Virtual Circuit Identifier (VPI/VCI) translation.

S2002 : Serial Backplane/Crosspoint Switches. Dual Serial Backplane Device. DUAL SERIAL BACKPLANE DEVICE DUAL SERIAL BACKPLANE DEVICE GENERAL Broad operating rate range - 1.3 GHz) - 1062 MHz (Fibre Channel) - 1250 MHz (Gigabit Ethernet) line rates - 1/2 Rate Operation Dual Transmitter with phase-locked loop (PLL) clock synthesis from low speed reference Dual Receiver PLL provides clock and data recovery Internally series terminated.

S2091 : 2.5 Gbit Port Bypass Circuit For Fibre Channel Arbitrated Loop. 2.5 GBIT PORT BYPASS CIRCUIT FOR FIBRE CHANNEL ARBITRATED LOOP 2.5 GBIT PORT BYPASS CIRCUIT FOR FIBRE CHANNEL ARBITRATED LOOP Supports 2.5 Gbps Data Rates Fully differential for minimum jitter accumulation TTL Bypass Select High speed 50 source terminated outputs 0.4W Typical power dissipation 3.3V power supply 20 Pin TSSOP functional and data bypasses.

S558-5999-30 : LAN Magnetic. XFMR Module, 10/100Base-TX. Meets all IEEE 802.3 standards including 350µH with 8mA bias Operating temperature 70° C Low profile, surface mount packaging rated 225° C peak IR reflow temperature Designed for use with a variety of 10/100 transceiver ICs Minimum interwinding breakdown voltage of 1500 Vrms Insertion Loss dB max Return Loss dB min Common to Differential Mode Rejection.

SNC599 : Two Channel Direct Drive Speech Controller.

TDAT042G51A-3BLL1 : Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces. The TDAT data interface is available in three different configurations as summarized in Table 1. The TDAT04622 device contains a subset of the TDAT042G5 device. The TDAT04622 device functions as described in the TDAT042G5 SONET/SDH 155/622/2488 Mbits/s Data Interface Data Sheet (DS98-193SONT-4) with the following limitations: Quad OC-3 operation only.

TSOT042G5 : TSOT042G5 Sonet/sdh 155/622/2488 Mbits/s Interface.

U4089B-P : Multi-standard Feature Phone Circuit With Voice Switch. DC Characteristic Adjustable Transmit and Receive Gain Adjustable Symmetrical Input of Microphone Amplifier Anti-clipping in Transmit Direction Automatic Line-loss Compensation Built-in Ear Protection DTMF and MUTE Input Adjustable Sidetone Suppression Independent of Sending and Receiving Amplification Integrated Amplifier for Loudhearing Operation.

U7006B : High Efficiency PA/ Lna With Control Management of Antenna Switch. The is a monolithic SiGe transmit/receive front end IC with power amplifier, internally 50- matched, low-noise amplifier and T/R switch driver. It is especially designed for operation in TDMA systems like DECT. Due to the ramp-control feature and a very low quiescent current an external switch transistor for VS is not required. Electrostatic sensitive.

XRT73L02A : Two-channel 3.3V DS3/E3/STS-1 Line Interface Unit. The XRT73L02A Dual Channel E3/DS3/STS-1 Transceiver is an improved version of the XRT73L02 and consists of two fully integrated transmitter and receiver line transceivers designed for DS3 or SONET STS-1 applications. Each channel can be configured to support the E3 (34.368 Mbps), DS3 (44.736 Mbps) or the SONET STS-1 (51.84 Mbps) rates. Each channel.

SY58626L : DC-to-6.4Gbps Backplane Transmit Buffer with Selectable Output Pre-emphasis, I/O DCOffset Control, and 200mV-3.0VPP Output Swing The SY58626L high-speed, low jitter transmit buffer is optimized for backplane and transmission line data-path management applications in Automatic Test Equipment (ATE) and Test & Measurement (T&M) systems. The buffer includes.

 
0-C     D-L     M-R     S-Z