|Category||Logic => Multiplexers/Demultiplexers => Multiplexers|
|Description||8-Line Multiplexer, Package: Plcc, Pins=20|
|Datasheet||Download MC10164L datasheet
|Cross ref.||Similar parts: MC10164|
The is a high speed, low power eightchannel data selector which routes data present at oneofeight inputs to the output. The data is routed according to the three bit code present on the address inputs. An enable input is provided for easy bit expansion. 310 mW typ/pkg (No Load) tpd 3.0 ns typ (Data to Output) tr, 2.0 ns typ (20%80%)CDIP16 L SUFFIX CASE PDIP16 P SUFFIX CASE 1 MC10164P AWLYYWW 1 10164 AWLYYWW MC10164L AWLYYWW
= Assembly Location = Wafer Lot = Year = Work Week
Pin assignment is for DualinLine Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D).
Device MC10164P MC10164FN Package PDIP16 PLCC20 Shipping 25 Units / Rail 25 Units / Rail 46 Units / RailCharacteristic Power Supply Drain Current Input Current
Output Voltage Output Voltage Threshold Voltage Threshold Voltage
Output Voltage Output Voltage Threshold Voltage Threshold Voltage Switching Times Propagation Delay
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50ohm resistor to 2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.
The MC10164 can be used wherever data multiplexing or parallel to serial conversion is desirable. Full parallel gating permits equal delays through any data path. The output of the MC10164 incorporates a buffer gate with eight data inputs and an enable. A high level on the enable forces the output low. The MC10164 can be connected directly to a data bus, due to its open emitter output and output enable.
Figure 1 illustrates how a 1of64 line multiplexer can be built with eight MC10164's wire ORed at their outputs and one MC10161 to drive the enables on each multiplexer, without speed degradation over a single MC10164 being experienced.
The Bit chosen is dependent on sixbit code present on inputs 14 of the MC10161 and the B, C inputs of the MC10164.
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