Details, datasheet, quote on part number: MC10171
PartMC10171
CategoryLogic => Bipolar->ECL 10 Family
TitleBipolar->ECL 10 Family
DescriptionDual Binary to 1-4 Decoder (low)
CompanyON Semiconductor
DatasheetDownload MC10171 datasheet
Cross ref.Similar parts: MC10171FNR2, MC10171L, MC10171P
Quote
Find where to buy
 
  

 

Features, Applications

The is a binary coded 2 line to dual 4 line decoder with selected outputs low. With either or E1 high, the corresponding selected 4 outputs are high. The common enable E, when high, forces all outputs high. 325 mW typ/pkg (No Load) tpd 4.0 ns typ tr, 2.0 ns typ (20%­80%)

= Assembly Location = Wafer Lot = Year = Work Week

Pin assignment is for Dual­in­Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D).

Device MC10171P MC10171FN Package PDIP­16 PLCC­20 Shipping 25 Units / Rail 25 Units / Rail 46 Units / Rail

Characteristic Power Supply Drain Current Input Current
Output Voltage Output Voltage Threshold Voltage Threshold Voltage
Output Voltage Output Voltage Threshold Voltage Threshold Voltage Switching Times Propagation Delay

Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50-ohm resistor to ­2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.


 

Some Part number from the same manufacture ON Semiconductor
MC10171FN Dual Binary to 1:4 Decoder (Low) , Package: Plcc, Pins=20
MC10171FNR2 Dual Binary to 1:4 Decoder (Low), Package: Plcc, Pins=20
MC10173 Quad 2-input Multiplexer/latch
MC10173L Quad 2-Input Multiplexer/Latch, Package: Cdip, Pins=16
MC10173P Quad 2-Input Multiplexer/latch , Package: Pdip, Pins=16
MC10174 Dual 4 to 1 Multiplexer
MC10174FN Dual 4:1 Multiplexer , Package: Plcc, Pins=20
MC10174L Dual 4:1 Multiplexer, Package: Cdip, Pins=16
MC10174P Dual 4:1 Multiplexer , Package: Plcc, Pins=20
MC10175 Quint Latch
MC10175FN Quint Latch , Package: Plcc, Pins=20
MC10175L Quint Latch, Package: Cdip, Pins=16
MC10175P Quint Latch , Package: Plcc, Pins=20
MC10176 Hex D Master/slave Flip-flop
MC10176FN Hex D-type Master-slave Flip-Flop, Package: Plcc, Pins=20
MC10176FNR2 Hex D-type Master-slave Flip-flop , Package: Plcc, Pins=20
MC10176L Hex D-type Master-slave Flip-Flop, Package: Plcc, Pins=20
MC10176P Hex D-type Master-slave Flip-flop , Package: Plcc, Pins=20
MC10178 Binary Counter
MC10178L Binary Counter, Package: Cdip, Pins=16
MC10186 Hex D Master-slave Flip-flop With Reset
Same catergory

100329 : Military/Aerospace->ECL. 100329 - Low Power Octal Ecl/ttl Bidirectional Translator With Register, Package: Cerquad, Pin Nb=24.

74FCT2573T : Octal Transparent Latch. A and C grades Low input and output leakage 1µA (max.) CMOS power levels True TTL input and output compatibility: ­ VOH = 3.3V (typ.) ­ VOL = 0.3V (typ.) Resistor outputs (-15mA IOH, 12mA IOL) Meets or exceeds JEDEC standard 18 s Reduced system switching noise Available in SOIC, QSOP, and TSSOP packages The is an octal transparent latch built using.

74HC7030 : Registers. 74HC/HCT7030; 9-bit X 64-word Fifo Register; 3-state;; Package: SOT117-1 (DIP28), SOT136-1 (SO28).

74LV240 : Bus Oriented Circuits. 74LV240; Octal Buffer/line Driver; Inverting (3-State).

74LVC138 : . 5 V tolerant inputs for interfacing with 5 V logic Wide supply voltage range from 3.6 V CMOS low power consumption Direct interface with TTL levels Inputs accept voltages 5.5 V Complies with JEDEC standard no. 8-1A Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active LOW mutually exclusive outputs.

HCF4067 : HCF->CMOS 4000B Series. Analog Multiplexer/demultiplexer. LOW ON RESISTANCE : 125 (Typ.) OVER 15V p-p SIGNAL INPUT RANGE FOR VDD - VSS = 15V HIGH OFF RESISTANCE : CHANNEL LEAKAGE OF 10pA (Typ.) at VDD - VSS = 10V MATCHED SWITCH CHARACTERISTICS : RON = 5 (Typ.) FOR VDD - VSS =15V VERY LOW QUIESCENT POWER DISSIPATION UNDER A DIGITAL CONTROL INPUT AND SUPPLY CONDITIONS : 0.2µW (Typ.) at VDD - VSS = 10V BINARY.

IDT74FCT623T : Bus Oriented Circuits. Fast CMOS Octal Bus Transceivers (3-state). Std., A and C speed grades Low input and output leakage 1µA (max.) CMOS power levels True TTL input and output compatibility ­ VOH = 3.3V (typ.) ­ VOL = 0.3V (typ.) High drive outputs (-15mA IOH, 64mA IOL) Power off disable outputs permit "live insertion" Meets or exceeds JEDEC standard 18 s Product available in Radiation Tolerant and Radiation Enhanced.

M74HC27 : HC/HCT->High Speed CMOS. Triple 3-INPUT NOR GATE. HIGH SPEED: tPD = 9ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 27 The is an high speed CMOS TRIPLE 3-INPUT.

MC74VHC32MEL : 2-1 Quad OR GATE, Package: SOEIAJ-14, Pins=14. The is an advanced high speed CMOS 2­input OR gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs.

SN54LVTH16835 : 3.3-v Abt 18-bit Universal Bus Drivers With 3-state Outputs. Members of the Texas Instruments Widebus TM Family State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC ) Support Unregulated Battery Operation Down 2.7 V Typical VOLP (Output Ground Bounce) V at VCC = 25°C Ioff.

SN74ABT32501 : Bus Oriented Circuits. 36-bit Universal Bus Transceivers With 3-state Outputs.

SN74ABT827DB : 10-bit Buffers/drivers With 3-state Outputs. State-of-the-Art EPIC-B TM BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) V at VCC = 25°C High-Impedance State During Power Up and Power Down High-Drive Outputs (­32-mA IOH, 64-mA IOL) Package Options.

SN74ALS641ADW : Standard Transceivers. ti SN74ALS641A, Octal Bus Transceivers With Open-collector Outputs.

SN74ALVCH32501 : Bus Oriented Circuits. 36-bit Universal Bus Transceiver With 3-state Outputs.

SN74BCT2424AFN : ti SN74BCT2424A, 16-Bit Latched Multiplexer/demultiplexer Bus Transceivers.

TPIC6C596 : CMOS/BiCMOS->HC/HCT Family. Power Logic 8-bit Shift Register. Low rDS(on). 7 Typ Avalanche Energy. 30 mJ Eight Power DMOS Transistor Outputs of 100-mA Continuous Current 250-mA Current Limit Capability ESD Protection. 2500 V Output Clamp Voltage. 33 V Enhanced Cascading for Multiple Stages All Registers Cleared With Single Input Low Power Consumption The is a monolithic, medium-voltage, low-current power 8-bit.

EPM7512AEBC256-10N : EE PLD, 5.5 ns, PBGA256. s: Package Type: Other, BGA-256 ; Logic Family: CMOS ; Pins: 256 ; Internal Frequency: 164 MHz ; User I/Os: 212 pins ; Propagation Delay: 5.5 ns ; Operating Temperature: 0 to 70 C (32 to 158 F) ; Supply Voltage: 3.3V.

74LV04PWDH-T : LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, PDSO14. s: Gate Type: NOT ; Supply Voltage: 3.3V ; Logic Family: CMOS ; Inputs: 1 ; Propagation Delay: 25 ns ; Operating Temperature: -40 to 125 C (-40 to 257 F) ; Pin Count: 14.

 
0-C     D-L     M-R     S-Z