|Category||Logic => Flip-Flops => Bipolar->ECL 10 Family|
|Title||Bipolar->ECL 10 Family|
|Description||Hex D Master-slave Flip-flop With Reset|
|Datasheet||Download MC10186 datasheet
The MC10186 contains six highspeed, master slave type "D" flipflops. Clocking is common to all six flipflops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positivegoing Clock transition. Thus, outputs may change only on a positivegoing Clock transition. A change in the information present at the data (D) input will not affect the output information any other time due to the masterslave construction of this device. A COMMON RESET IS INCLUDED IN THIS CIRCUIT. RESET ONLY FUNCTIONS WHEN CLOCK IS LOW. 460 mW typ/pkg (No Load) ftoggle = 150 MHz (typ) tr, 2.0 ns typ (20%80%)CDIP16 L SUFFIX CASE PDIP16 P SUFFIX CASE AWLYYWW MC10186P AWLYYWW MC10186L AWLYYWW
= Assembly Location = Wafer Lot = Year = Work Week
Pin assignment is for DualinLine Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D).
Device MC10186P MC10186FN Package PDIP16 PLCC20 Shipping 25 Units / Rail 25 Units / Rail 46 Units / Rail*A clock is a clock transition from a low to a high state.
Characteristic Power Supply Drain Current Input Current
IinL Output Voltage Output Voltage Threshold Voltage Threshold Voltage Logic 1 Logic 0 Logic 1 Logic 0 VOH VOL VOHA VOLARise Time Fall Time Setup Time Hold Time
[ Output level to be measured after clock pulse.
IinL Output Voltage Output Voltage Threshold Voltage Threshold Voltage Switching Times Propagation Delay Logic 1 Logic 0 Logic 1 Logic 0 (50 Load) VOH VOL VOHA VOLARise Time Fall Time Setup Time Hold Time Toggle Frequency (Max)
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50ohm resistor to 2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.
|Some Part number from the same manufacture ON Semiconductor|
|MC10186FN Hex D-type Master-slave Flip-flop With Reset , Package: Plcc, Pins=20|
|MC10186FNR2 Hex D-type Master-slave Flip-flop With Reset, Package: Plcc, Pins=20|
|MC10186P Hex D-type Master-slave Flip-flop With Reset , Package: Plcc, Pins=20|
|MC10188 Hex Buffer With Enable|
|MC10188FN Hex Buffer With Enable , Package: Plcc, Pins=20|
|MC10188FNR2 Hex Buffer With Enable, Package: Plcc, Pins=20|
|MC10188P Hex Buffer With Enable , Package: Plcc, Pins=20|
|MC10189 Hex Inverter With Enable|
|MC10189FN Hex Inverter With Enable , Package: Plcc, Pins=20|
|MC10189FNR2 Hex Inverter With Enable, Package: Plcc, Pins=20|
|MC10189P Hex Inverter With Enable , Package: Plcc, Pins=20|
|MC10192 Quad Bus Driver|
|MC10192FN Quad Bus Driver , Package: Plcc, Pins=20|
|MC10192FNR2 Quad Bus Driver, Package: Plcc, Pins=20|
|MC10192P Quad Bus Driver , Package: Plcc, Pins=20|
|MC10195 Hex Inverter/buffer|
|MC10195L Hex Inverter/Buffer, Package: Cdip, Pins=16|
|MC10197 Hex And Gate|
|MC10197FNR2 Hex And Gate , Package: Plcc, Pins=20|
|MC10197L Hex And Gate, Package: Cdip, Pins=16|
|MC10197P Hex And Gate , Package: Plcc, Pins=20|
BC548BRL1 : Transistor NPN Silicon Plastic , Package: TO-92 (TO-226), Pins=3
MC10116FN : Triple Line Receiver
MC33460SQ-32ATR : Under Voltage Detector Series
MTP20N15E : Power MOSFET 20 Amps, 150 Volts, Package: TO-220, Pins=3
NCP5331FTR2 : Two Phase Cpu Controller With Integrated Gate Drivers For Amd's Athlon Processor
NTD4815N-1G : Power MOSFET 30 V, 88 A, Single N-Channel, DPAK/IPAK
AN1672 : The ECL Translator Guide
NUS3045MNT1 : Overvoltage Protection IC with Integrated Mosfet
MC10ELT20DTR2G : 5 V TTL to Differential PECL and Differential PECL to TTL Translator
NUF2030XV6 : USB Upstream Terminator with ESD Protection
54F378FM : Parallel D Register With Enable. The a 6-bit register with a buffered common Enable This device is similar to the 'F174 but with common Enable rather than common Master Reset 6-bit high-speed parallel register Positive edge-triggered D-type inputs Fully buffered common clock and enable inputs Input clamp diodes limit high-speed termination effects Full TTL and CMOS compatible Package.
CD4007UB : CMOS/BiCMOS->4000 Family. CMOS Dual Complementary PaIR Plus Inverter.
CD54HC367 : CMOS/BiCMOS->HC/HCT Family. High Speed CMOS Logic Hex Buffer/line Driver, Three-state Non-inverting And Inverting.
CD74HCT4543E : Decoders. ti CD74HCT4543, High Speed CMOS Logic BCD-to-7 Segment Latch/decoder/driver For LCDS.
DM74LS169A : Bipolar->LS Family. Synchronous 4-Bit Up/down Binary Counter. This synchronous presettable counter an internal carry look-ahead for cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously, so that the outputs all change at the same time when so instructed by the countenable inputs and internal gating. This mode of operation helps eliminate.
HCF4034 : HCF->CMOS 4000B Series. 8-STAGE Static Bidirectional Parallel/serial Input/output Bus Register.
IDT74LVCHR245A : Low Voltage CMOS/BiCMOS->LVC/ALVC/VCX Family. 3.3v CMOS Octal Bus Transceiver With 3-state Outputs, 5v Tolerant I/o, Bus-hold.
M66257FP : 5120 X 8-bit Line Memory (Fifo). The is a high-speed line memory with a FIFO (First In First Out) structure × 8-bit double configuration which uses high-performance silicon gate CMOS process technology. It allows simultaneous output of 1-line delay data and 2-line delay data, and is most suitable for data correction over multiple lines. It has separate clock, enable and reset signals.
MC54F379J : Quad Parallel Register With Enable. The a 4-bit register with a buffered common enable. This device is similar to the F175 but the common Enable rather than common Master Reset. The F379 consists of four edge-triggered D-type flip-flops with individual D inputs and Q and Q outputs. The Clock (CP) and Enable (E) inputs are common to all flip-flops. When E is HIGH, the register will retain.
SN74AS04 : Bipolar->AS Family. Hex Inverter/buffer. Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs These devices contain six independent hex inverters. They perform the Boolean function = A. The SN54ALS04B and SN54AS04 are characterized for operation over the full military temperature range to 125°C. The SN74ALS04B.
SN74AVC16244DGG : 16-bit Buffer/driver With 3-state Outputs. Member of the Texas Instruments Widebus TM Family EPIC TM (Enhanced-Performance Implanted CMOS) Submicron Process DOC TM (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation Less Than 2-ns Maximum Propagation Delay at 2.5-V and 3.3-V VCC Dynamic Drive Capability Is Equivalent to Standard.
SN74LS446 : Bipolar->S Family. Quadruple Bus Transceivers With Individual Direction Controls.
SN74TVC3010DBQR : Translator Voltage Clamps. ti SN74TVC3010, 10-Bit Voltage Clamp. Designed to be Used in Voltage-Limiting Applications 6.5- On-State Connection Between Ports A and B Flow-Through Pinout for Ease of Printed Circuit Board Trace Routing Direct Interface With GTL+ Levels ESD Protection Exceeds JESD 2000-V Human-Body Model 1000-V Charged-Device Model (C101) The SN74TVC3010 provides 11 parallel NMOS pass transistors.
A32300DX-CQG208B : FPGA, 3721 CLBS, 30000 GATES, CQFP256. s: System Gates: 30000 ; Logic Cells / Logic Blocks: 3721 ; Package Type: QFP, Other, HEAT SINK, CAVITY-UP, CERAMIC, QFP-208 ; Logic Family: CMOS ; Pins: 256 ; Operating Temperature: -55 to 125 C (-67 to 257 F) ; Propagation Delay: 4 ns ; Supply Voltage: 5V.
AFS600-FFG256 : FPGA, 600000 GATES, PBGA256. s: System Gates: 600000 ; Package Type: Other, 1.0 MM PITCH, BGA-256 ; Logic Family: CMOS ; Pins: 256 ; Operating Temperature: 0 to 70 C (32 to 158 F) ; Supply Voltage: 1.5V.
SN74S09NE4 : S SERIES, QUAD 2-INPUT AND GATE, PDIP14. s: Gate Type: AND ; Supply Voltage: 5V ; Output Type: Open Collector ; Logic Family: TTL ; Inputs: 2 ; Propagation Delay: 10 ns ; Operating Temperature: 0 to 70 C (32 to 158 F) ; Pin Count: 14 ; IC Package Type: DIP, Other, ROHS COMPLIANT, PLASTIC, MS-001AA, DIP-14.
10525/BEAJC : ECL TO TTL TRANSLATOR, CDIP16. s: Logic Family: TTL, ECL ; Package Type: DIP, CERAMIC, DIP-16.