Details, datasheet, quote on part number: MC10189
PartMC10189
CategoryLogic => Gates => Bipolar->ECL 10 Family
TitleBipolar->ECL 10 Family
DescriptionHex Inverter With Enable
CompanyON Semiconductor
DatasheetDownload MC10189 datasheet
Cross ref.Similar parts: MC10189FN, MC10189FNR2, MC10189P
Quote
Find where to buy
 
  

 

Features, Applications

The MC10189 provides a high-speed Hex Inverter with a common Enable input. The hex inverting function is provided when Enable is in the low state. When Enable is in the high state all outputs are low. 200 mW typ/pkg (No Load) tpd 2.0 ns (Y­Q) 2.5 ns (X­Q)

VCC1 AOUT BOUT COUT AIN BIN CIN VEE VCC2 FOUT EOUT DOUT FIN EIN DIN COMMON
= Assembly Location = Wafer Lot = Year = Work Week

Device MC10189P MC10189FN Package PDIP­16 PLCC­20 Shipping 25 Units / Rail 25 Units / Rail 46 Units / Rail

Pin assignment is for Dual­in­Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D).

Characteristic Power Supply Drain Current Input Current

Output Voltage Output Voltage Threshold Voltage Threshold Voltage Switching Times Propagation Delay Rise/Fall Time

Logic 1 Logic 0 Logic 1 Logic 0 (50 Load) Enable Data to 80%)
TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHmax VILmin VIHAmin VILAmax VEE
Logic 1 Logic 0 Logic 1 Logic 0 (50 Load) Enable Data to 80%)

Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50­ohm resistor to ­2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.

PLCC­20 FN SUFFIX PLASTIC PLCC PACKAGE CASE 775­02 ISSUE C

NOTES: 1. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM -T-, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635).


 

Some Part number from the same manufacture ON Semiconductor
MC10189FN Hex Inverter With Enable , Package: Plcc, Pins=20
MC10189FNR2 Hex Inverter With Enable, Package: Plcc, Pins=20
MC10189P Hex Inverter With Enable , Package: Plcc, Pins=20
MC10192 Quad Bus Driver
MC10192FN Quad Bus Driver , Package: Plcc, Pins=20
MC10192FNR2 Quad Bus Driver, Package: Plcc, Pins=20
MC10192P Quad Bus Driver , Package: Plcc, Pins=20
MC10195 Hex Inverter/buffer
MC10195L Hex Inverter/Buffer, Package: Cdip, Pins=16
MC10197 Hex And Gate
MC10197FNR2 Hex And Gate , Package: Plcc, Pins=20
MC10197L Hex And Gate, Package: Cdip, Pins=16
MC10197P Hex And Gate , Package: Plcc, Pins=20
MC10198 Monostable Multivibrator
MC10198FN Monostable Multivibrator , Package: Plcc, Pins=20
MC10198FNR2 Monostable Multivibrator, Package: Plcc, Pins=20
MC10216 High Speed Triple Line Receiver
MC10216FN High Speed Triple Line Receiver , Package: Plcc, Pins=20
MC10216L High Speed Triple Line Receiver, Package: Cdip, Pins=16
MC10216P High Speed Triple Line Receiver , Package: Plcc, Pins=20
MC10231 High Speed Dual Type D Master-slave Flip-flop
Same catergory

5400 : Bipolar->TTL Family. Quad 2-input NAND Gates. This device contains four independent gates each of which performs the logic NAND function. Order Number DM7400M DM7400N Package Number M14A N14A Package 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify.

5962-9056201LA : Multiplexers. ti SN54AS250A, 1-Of-16 Data Generators/multiplexers With 3-State Outputs.

5962-9450901Q3A : Inverting Buffers and Drivers. ti SN54ABT827, 10-Bit Buffers/drivers With 3-State Outputs.

5962-9684901QXA : Registered Transceivers. ti SN54LVTH16952, 3.3-V Abt 16-BIT Registered Transceivers With 3-STATE Outputs.

74ACT16833DL : Parity Transceivers. ti 74ACT16833, Dual 8-Bit to 9-Bit Parity Bus Transceivers.

CP82C82 : CMOS Octal Latching Bus Driver. The Intersil is a high performance CMOS Octal Latching Buffer manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). The 82C82 provides an eight-bit parallel latch/buffer a 20 pin package. The active high strobe (STB) input allows transparent transfer of data and latches data on the negative transition of this signal. The active.

MC10E195 : Bipolar->ECL 100 Family. Programmable Delay Chip. The is a programmable delay chip (PDC) designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL input transition. The delay section consists of a chain of gates organized as shown in the logic symbol. The first two delay elements feature gates that have been modified to have delays 1.25 and 1.5 times.

MC54F125J : Quad Buffers, 3-state Fast Shottky TTL. High Impedance NPN Base Inputs for Reduced Loading QUAD BUFFERS, 3-STATE Symbol VCC TA Supply Voltage Operating Ambient Temperature Range Parameter IOH IOL Output Current High 54 74 Output Current Low 54 74 Min ­55 0 Typ 5.0 25 Max mA Unit V °C Inputs Output LOW Voltage Level H = HIGH Voltage Level X = Don't Care Z = High Impedance (off) DC CHARACTERISTICS.

SN10KHT5540DW : ECL/TTL Functions. ti SN10KHT5540, Octal Ecl-to-ttl Translator With 3-State Ouputs.

SN74ALS654DW : Registered Transceivers. ti SN74ALS654, Octal Bus Transceivers/registers With 3-State Outputs.

SN74LV27A : . to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce) V at VCC, = 25°C Typical VOHV (Output VOH Undershoot) V at VCC, = 25°C Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD ­ 2000-V Human-Body Model ­ 200-V Machine Model ­ 1000-V Charged-Device Model (C101) These.

TPIC6A259 : Bipolar->TTL Family. Power Logic 8-bit Addressable Latch: 8-bit. Low rDS(on). 1 Typ Output Short-Circuit Protection Avalanche Energy. 75 mJ Eight 350-mA DMOS Outputs 50-V Switching Capability Four Distinct Function Modes Low Power Consumption This power logic 8-bit addressable latch controls open-drain DMOS-transistor outputs and is designed for general-purpose storage applications in digital systems. Specific uses.

TSC350 : Multiplexers.

EP2C15AF256C6 : FPGA, PBGA256. s: Device Type: FPGA ; Package Type: Other, FBGA-256 ; Pins: 256 ; Operating Temperature: 0 to 85 C (32 to 185 F) ; Supply Voltage: 1.2V.

MT90869AG2 : TELECOM, DIGITAL TIME SWITCH, PBGA272. s: Supply Voltage (VS): 1.8 volts ; Operating Temperature: -40 to 85 C (-40 to 185 F) ; Number of Pins: 272 ; Package Type: 27 X 27 MM, 1.27 MM PITCH, LEAD FREE, PLASTIC, MS-034BAL-2, BGA-272 ; Standards and Certifications: RoHS.

TC4001UBP : 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDIP14. s: Gate Type: NOR ; Supply Voltage: 5V ; Logic Family: CMOS ; Inputs: 2 ; Propagation Delay: 120 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F) ; Pin Count: 14 ; IC Package Type: DIP, Other, 0.300 INCH, PLASTIC, DIP-14.

74LCX11CW : LVC/LCX/Z SERIES, TRIPLE 3-INPUT AND GATE, UUC14. s: Gate Type: AND ; Logic Family: CMOS ; Inputs: 3 ; Pin Count: 14.

855S54AKILF : MULTIPLEXER, QCC16. s: Package Type: 3 X 3 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VEED-2, VFQFN-16 ; Number of Pins: 16.

 
0-C     D-L     M-R     S-Z