|Category||Logic => Gates => Bipolar->ECL 10 Family|
|Title||Bipolar->ECL 10 Family|
|Description||Hex And Gate|
|Datasheet||Download MC10197 datasheet
The MC10197 provides a high speed hex AND function with strobe capability. 200 mW typ/pkg (No Load) tpd 2.8 ns typ (BQ) tpd 3.8 ns typ (AQ) tr, 2.5 ns typ (20%80%)CDIP16 L SUFFIX CASE PDIP16 P SUFFIX CASE 1 MC10197P AWLYYWW MC10197L AWLYYWW
VCC1 AOUT BOUT COUT AIN BIN CIN VEE VCC2 FOUT EOUT DOUT FIN EIN DIN COMMON
= Assembly Location = Wafer Lot = Year = Work Week
Device MC10197P MC10197FN Package PDIP16 PLCC20 Shipping 25 Units / Rail 25 Units / Rail 46 Units / Rail
Pin assignment is for DualinLine Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D).Characteristic Power Supply Drain Current Input Current
Output Voltage Output Voltage Threshold Voltage Threshold Voltage
Switching Times (50 Load) Propagation Delay Rise Time Fall Time to 80%)
TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHmax VILmin VIHAmin VILAmax VEE V
Output Voltage Output Voltage Threshold Voltage Threshold Voltage Switching Times Propagation Delay Rise Time Fall Time
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50ohm resistor to 2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.PLCC20 FN SUFFIX PLASTIC PLCC PACKAGE CASE 77502 ISSUE C
NOTES: 1. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM -T-, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635).
|Some Part number from the same manufacture ON Semiconductor|
|MC10197FNR2 Hex And Gate , Package: Plcc, Pins=20|
|MC10197L Hex And Gate, Package: Cdip, Pins=16|
|MC10197P Hex And Gate , Package: Plcc, Pins=20|
|MC10198 Monostable Multivibrator|
|MC10198FN Monostable Multivibrator , Package: Plcc, Pins=20|
|MC10198FNR2 Monostable Multivibrator, Package: Plcc, Pins=20|
|MC10216 High Speed Triple Line Receiver|
|MC10216FN High Speed Triple Line Receiver , Package: Plcc, Pins=20|
|MC10216L High Speed Triple Line Receiver, Package: Cdip, Pins=16|
|MC10216P High Speed Triple Line Receiver , Package: Plcc, Pins=20|
|MC10231 High Speed Dual Type D Master-slave Flip-flop|
|MC10231FN High Speed Dual Type D-type Master-slave Flip-flop , Package: Plcc, Pins=20|
|MC10231FNR2 High Speed Dual Type D-type Master-slave Flip-Flop, Package: Plcc, Pins=20|
|MC10231P High Speed Dual Type D-type Master-slave Flip-flop , Package: Plcc, Pins=20|
|MC1066 Acpi-compliant Smbus Temperature Sensor With Internal And External Diode Input|
|MC10E016 8-bit SYNCH Binary Counter|
|MC10E016FN 5V Ecl 8-Bit Synchronous Binary up Counter , Package: Plcc, Pins=28|
|MC10E016FNR2 5V Ecl 8-Bit Synchronous Binary up Counter, Package: Plcc, Pins=28|
|MC10E101 Quad 4-input Or/nOR GATE|
|MC10E101FN 5V Ecl Quad 4-Input Or/nOR GATE , Package: Plcc, Pins=28|
|MC10E104 Quint 2-input And/nand Gate|
74LVCR162245A : 16/32-Bit Bus Transceiver->CMOS/BiCMOS->FCT/FCT-T. 3.3v CMOS 16-bit Bus Transceiver With 3-state Outputs And 5v Tolerant I/o.
84010013A : D-Type (3-State) Flip-Flops. ti SN54ALS874B, Octal 4-Bit D-type Edge-triggered Flip-flops With 3-state Outputs.
93L24 : Bipolar->AS Family. 5-bit Comparator. The 93L24 expandable comparator provides comparison between two 5-bit words and gives three outputs ``less than'' ``greater than'' and ``equal to'' A HIGH on the active LOW Enable Input forces all three outputs LOW Three separate outputs AkB AlB e B Easily expandable Active low enable input Pin Names B4 AkB AlB AeB Enable Input (Active LOW) Word A Parallel.
BU4S81 : . The is an ultra-compact IC with one dual-input positive logic AND gate BU4081B circuit built into an SMP. 1) Low current dissipation. 2) Super-mini mold package designed for surface mounting. 3) Wide range of operating power supply voltages. 4) Direct drive of 2 L-TTL inputs and 1 LS-TTL input. Parameter Power supply voltage Power dissipation Input.
CD40110B : CMOS/BiCMOS->4000 Family. CMOS Decade Up-down Counter/latch/display Driver.
CD54ACT541 : CMOS/BiCMOS->AC/ACT Family. Octal Buffer/line Drivers, 3-state. Data sheet acquired from Harris Semiconductor SCHS285A Revised November 1999 The CD54/74AC540, -541, and CD54/74ACT540, -541 octal buffer/line drivers use the RCA ADVANCED CMOS technology. The CD54/74AC/ACT540 are inverting 3-state buffers having two active-LOW output enables. The CD54/74AC/ACT541 are non-inverting 3-state buffers having two active-LOW.
CD54ACT564 : Octal D-type Flip-Flops, 3-state Positive-edge-triggered. Data sheet acquired from Harris Semiconductor SCHS292 This data sheet is applicable to the CD54/74AC574 and CD54/74ACT574. The CD54/74AC564 and CD54/74ACT564 were not acquired from Harris Semiconductor. .
DM74LS534 : Bipolar->LS Family. Octal D Flip-flop With 3-STATE Outputs. The is a high speed, low power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus oriented applications. A buffered Clock (CP) and Output Enable (OE) is common to all flip-flops. The DM74LS534 is the same as the DM74LS374 except that the outputs are inverted. Order Number DM74LS534N Package Number.
HD74HC4511 : Bcd-to-seven Segment Latch/decoder/driver. Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp. The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips.
IN74AC109D : Dual J-k Positive-edge-triggered Flip-flop 16. The IN74AC109 is identical in pinout to the LS/ALS109,HC/HCT109. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LS/ALS outputs. This device consists of two J-K flip-flops with individual set, reset, and clock inputs. Changes at the inputs are reflected at the outputs with the next low-to-high.
MC100E104FN : Quint 2-Input And/nand Gate , Package: Plcc, Pins=28. The is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be used. The 100 Series contains temperature compensation. 600 ps Max. Propagation Delay OR/NOR Function Outputs PECL Mode Operating Range: VCC= 5.7 V with VEE= 0 V NECL.
MC74VHC1G32 : CMOS/BiCMOS->VHC/VHCT/74V1 Family->Low Voltage. 2-input OR GATE.
SN74LS155D : Dual 1-of-4 Decoder/ Demultiplexer. The / 74LS155 and / 74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder "a" has an Enable gate with one active HIGH and one active LOW input. Decoder "b" has two active LOW Enable inputs. If the Enable functions are satisfied, one output.
SN74LS377 : Bipolar->LS Family. Octal D Flip-flop With 3-state Outputs And Clock Enable.
SN74LS593 : 8-bit Binary Counter With 3-state I/o Register.
SN74LV138 : CMOS/BiCMOS->LV/LVQ/LVX Family->Low Voltage. 3-line to 8-line Decoder/demultiplexer.
Tc74HC688AP : TC74HC Series. Function = 8-bit Equality Comparator ;; Pins = 20.
A3P060-1TQG144II : FPGA, 1536 CLBS, 60000 GATES, 350 MHz, PQFP144. s: System Gates: 60000 ; Logic Cells / Logic Blocks: 1536 ; Package Type: TQFP, Other, 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, GREEN, TQFP-144 ; Logic Family: CMOS ; Pins: 144 ; Internal Frequency: 350 MHz ; Operating Temperature: -40 to 85 C (-40 to 185 F) ; Supply Voltage: 1.5V.
SN74HC251DBE4 : HC/UH SERIES, 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO16. s: Output Characteristics: 3-State, Complementary Output ; Supply Voltage: 5V ; Package Type: SSOP, PLASTIC, SSOP-16 ; Logic Family: CMOS ; Number of Pins: 16 ; Inputs: 8 ; Propagation Delay: 375 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F).