|Category||Logic => Flip-Flops|
|Description||High Speed Dual Type D-type Master-slave Flip-Flop, Package: Plcc, Pins=20|
|Datasheet||Download MC10231FNR2 datasheet
|MC10231 High Speed Dual Type D Master-Slave Flip-Flop
The is a dual masterslave type D flipflop. Asynchronous Set (S) and Reset (R) override Clock (CC) and Clock Enable (CE) inputs. Each flipflop may be clocked separately by holding the common clock in the low state and using the enable inputs for the clocking function. If the common clock to be used to clock the flipflop, the Clock Enable inputs must be in the low state. In this case, the enable inputs perform the function of controlling the common clock. The output states of the flipflop change on the positive transition of the clock. A change in the information present at the data (D) input will not affect the output information at any other time due to masterslave construction. 270 mW typ/pkg (No Load) tpd 2 ns typ tTog = 225 MHz typ tr, 2.0 ns typ (20%80%)
CDIP16 L SUFFIX CASE PDIP16 P SUFFIX CASE PLCC20 FN SUFFIX CASE 775 10231 AWLYYWW MC10231P AWLYYWW MC10231L AWLYYWW= Assembly Location = Wafer Lot = Year = Work Week
CE + CC. A clock is a clock transition from a low to a high state.
Pin assignment is for DualinLine Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D).
Device MC10231P MC10231FN Package PDIP16 PLCC20 Shipping 25 Units / Rail 25 Units / Rail 46 Units / RailCharacteristic Power Supply Drain Current Input Current
IinL Output Voltage Output Voltage Threshold Voltage Threshold Voltage Logic 1 Logic 0 Logic 1 Logic 0 VOH VOL VOHA VOLASetup Time Hold Time Toggle Frequency (Max)
* Individually test each input; apply VILmin to pin under test. [ Output level to be measured after a clock pulse has been applied to the CE Input (Pin 6)
IinL Output Voltage Output Voltage Threshold Voltage Threshold Voltage Switching Times Clock Input Logic 1 Logic 0 Logic 1 Logic 0 (50 Load) VOH VOL VOHA VOLA
* Individually test each input applying IH or VIL to input under test. [ Output level to be measured after a clock pulse has been applied to the CE Input (Pin 6)
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50ohm resistor to 2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.
|Related products with the same datasheet|
|Some Part number from the same manufacture ON Semiconductor|
|MC10231L High Speed Dual Type D-type Master-slave Flip-Flop, Package: Plcc, Pins=20|
|MC10231P High Speed Dual Type D-type Master-slave Flip-flop , Package: Plcc, Pins=20|
|MC1066 Acpi-compliant Smbus Temperature Sensor With Internal And External Diode Input|
|MC10E016 8-bit SYNCH Binary Counter|
|MC10E016FN 5V Ecl 8-Bit Synchronous Binary up Counter , Package: Plcc, Pins=28|
|MC10E016FNR2 5V Ecl 8-Bit Synchronous Binary up Counter, Package: Plcc, Pins=28|
|MC10E101 Quad 4-input Or/nOR GATE|
|MC10E101FN 5V Ecl Quad 4-Input Or/nOR GATE , Package: Plcc, Pins=28|
|MC10E104 Quint 2-input And/nand Gate|
|MC10E104FN Quint 2-Input And/nand Gate , Package: Plcc, Pins=28|
|MC10E107 Quint 2-input Xor/xnOR GATE|
|MC10E107FN 5V Ecl Quint 2-Input Xor/xnOR GATE , Package: Plcc, Pins=28|
|MC10E111 1:9 Differential Clock Driver|
|MC10E111FN 5V Ecl 1:9 Differential Clock Driver , Package: Plcc, Pins=28|
|MC10E111FNR2 5V Ecl 1:9 Differential Clock Driver, Package: Plcc, Pins=28|
|MC10E111SFN 5V Ecl 1:9 Differential Clock Driver , Package: Plcc, Pins=28|
|MC10E112 Quad Drive, Common Enable|
|MC10E112FN 5V Ecl Quad Driver , Package: Plcc, Pins=28|
|MC10E116 Quint Diff Line Receiver|
|MC10E116FN 5V Ecl Quint Differential Line Receiver , Package: Plcc, Pins=28|
|MC10E122 9-bit Buffer|
54F676 : Military/Aerospace->FAST. 54F676 - 16-Bit Serial/Parallel-In, Serial-out Shift Register, Package: Cerpack, Pin Nb=24.
54F74FM : Dual D-type Positive Edge-triggered Flip-flop. The is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q Q) outputs Information at the input is transferred to the outputs on the positive edge of the clock pulse Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse After the Clock Pulse.
5962-8606101EA : Multiplexers. ti CD54HC157, High Speed CMOS Logic Quad 2-Input Multiplexers.
74LX1G126 : LCX Low Voltage HCMOS. Low Voltage Single Bus Buffer (3-STATE). 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.5ns (MAX.) at VCC = 3V LOW POWER DISSIPATION: ICC = 1µA (MAX.) = 25°C POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) 5.5V (1.2V Data Retention) IMPROVED LATCH-UP IMMUNITY The is a low voltage.
CD74HC367E : Non-Inverting Buffers and Drivers. ti CD74HC367, High Speed CMOS Logic Hex Buffers/line Drivers With Non-inverting 3-State Outputs.
HEF40162BD : 4-bit Synchronous Decade Counter With Synchronous Reset. For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family s HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40162B MSI 4-bit synchronous decade counter with synchronous reset Product File under Integrated Circuits, IC04 January 1995 4-bit synchronous decade counter with synchronous reset The is a fully.
HEF4030BF : Quadruple Exclusive-OR GATE. For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family s HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC Product File under Integrated Circuits, IC04 January 1995 The HEF4030B provides the positive quadruple exclusive-OR function. The outputs are fully buffered for highest noise immunity and pattern.
MC74HC164AD : Shift 8-Bit Serial Input/output , Package: Soic, Pins=14. The MC74HC164A is identical in pinout to the LS164. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The an 8bit, serialinput to paralleloutput shift register. Two serial data inputs, A1 and A2, are provided so that one input may be used as a data enable. Data is entered on each.
MM54C151 : 8-CHANNEL Digital Multiplexer Life-time Buy. The MM54C151 multiplexer is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. This data selector/multiplexer contains on-chip binary decoding. Two outputs provide true (output Y) and complement (output W) data. A logical "1" on the strobe input forces to a logical "1" and to a logical.
MM74HC86 : CMOS/BiCMOS->HC/HCT Family. Quad 2-Input Exclusive OR GATE. The MM74HC86 EXCLUSIVE OR gate utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to equivalent LS-TTL gates while maintaining the low power consumption and high noise immunity characteristic of standard CMOS integrated circuits. These gates are fully buffered and have a fanout of 10 LS-TTL loads. The 74HC logic family.
SN54ABT853 : Bus Oriented Circuits. State-of-the-Art EPIC-B TM BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model = 200 pF, = 0) Latch-Up Performance Exceeds 500 mA Per JESD 17 Typical VOLP (Output Ground Bounce) V at VCC = 25°C High-Drive Outputs (32-mA IOH, 64-mA IOL) High-Impedance State.
SN54S169FK : Synchronous 4-bit Up/down Binary Counters. PRODUCTION DATA information is current as of publication date. Products conform to s per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. .
TC74VHCT240AF : CMOS/BiCMOS->VHC/VHCT/74V1 Family->Low Voltage. Octal Bus Buffer With Inverted 3-state Outputs.
U74HC08G-P14-R : HC/UH SERIES, QUAD 2-INPUT AND GATE, PDSO14. s: Gate Type: AND ; Supply Voltage: 4.5 ; Logic Family: CMOS ; Inputs: 2 ; Propagation Delay: 100 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F) ; Pin Count: 14 ; IC Package Type: TSSOP, Other, HALOGEN FREE, TSSOP-14.