Details, datasheet, quote on part number: I74F164N
Description8-bit Serial-in Parallel-out Shift Register
CompanyPhilips Semiconductors (Acquired by NXP)
DatasheetDownload I74F164N datasheet
Cross ref.Similar parts: CD54ACT164, CD54HCT164, CD74ACT164, CD74HCT164, SN54LS164, SN54LS164-SP, SN54LS91, SN74LS164, 74F164A
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Features, Applications


Gated serial data inputs Typical shift frequency of 100MHz Asynchronous Master Reset Buffered clock and data inputs Fully synchronous data transfer Industrial temperature range available to +85C)


The an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered through one of two inputs (Dsa, Dsb); either input can be used as an active High enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied High. Data shifts one place to the right on each Low-to-High transition of the clock (CP) input, and enters into Q0 the logical AND of the two data inputs (Dsa, Dsb) that existed one setup time before the rising edge. A Low level on the Master Reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all outputs Low.

ORDER CODE DESCRIPTION 14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC 5V 10%, Tamb 74F164N 74F164D INDUSTRIAL RANGE VCC 5V 10%, Tamb I74F164N I74F164D DRAWING NUMBER SOT27-1 SOT108-1

PINS Dsa, Dsb Q7 Data inputs Clock pulse input (active rising edge) Master reset input (active-Low) Data outputs DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW 20A/0.6mA 1.0mA/20mA

One (1.0) FAST unit load is defined as: 20A in the High state and 0.6mA in the Low state.
INPUTS CP X Dsa Dsb L q1 OUTPUTS L q6 Shift Reset (Clear) OPERATING MODE

High voltage level High voltage level one setup time prior to the Low-to-High clock transition. Low voltage level Low voltage level one setup time prior to the Low-to-High clock transition. Lower case letter indicate the state of the referenced output one setup time prior to the Low-to-High clock transition. Don't care Low-to-High clock transition

(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb b Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Commercial Range Operating temperature O erating free-air tem erature range Storage temperature range Industrial Range PARAMETER RATING 0.5 to VCC to +150 UNIT mA C

LIMIT SYMBOL VCC VIH VIL IIk IOH IOL Tamb b Supply voltage High-level iput voltage Low-level input voltage Input clamp current High-level output current Low-level output current Commercial Range Operating O erating free-air tem temperature erature range Industrial Range 0 40 PARAMETER MIN NOM 5.0 MAX 5.5 UNIT mA C


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