Details, datasheet, quote on part number: I74F280BD
PartI74F280BD
CategoryLogic => Parity Generators/Checkers
Description9-bit Odd/even Parity Generator/checker
CompanyPhilips Semiconductors (Acquired by NXP)
DatasheetDownload I74F280BD datasheet
Cross ref.Similar parts: SN74F280BD, SN54F521, SN74F521, 74ACT11286, SN74AS280, SN74AS286, SN74LS280, 74F280, 74F280SC
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Features, Applications

FEATURES

Buffered inputs one normalized load Word length easily expanded by cascading Industrial temperature range available to +85°C)

DESCRIPTION

The a 9-bit Parity Generator or Checker commonly used to detect errors in high speed data transmission or data retrieval systems. Both Even (E) and Odd (O) parity outputs are available for generating or checking even or odd parity to 9 bits. The Even (E) parity output is High when an even number of Data inputs - I8) are High. The Odd (O) parity output is High when an odd number of Data inputs are High. Expansion to larger word sizes is accomplished by tying the Even (E) outputs up to nine parallel devices to the data inputs of the final stage. This expansion scheme allows an 81-bit data word to be checked in less than 20ns. TYPE 74F280B

DESCRIPTION 14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC 5V ±10%, Tamb N74F280BN N74F280BD INDUSTRIAL RANGE VCC 5V ±10%, Tamb I74F280BN I74F280BD PKG. DWG. SOT27-1 SOT108-1

PINS , O DESCRIPTION Data inputs Parity outputs 74F(U.L.) HIGH/LOW 1.0/0.033 50/33 LOAD VALUE HIGH/LOW 20µA/20µA 1.0mA/20mA

NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.

INPUTS Number of High Data Inputs - I8) Even Odd H = High voltage level L = Low voltage level OUTPUTS


 

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