|Category||Discrete => Thyristors => Triacs|
Planar passivated sensitive gate four quadrant triac in a SOT54 (TO-92) plastic package intended for use in applications requiring enhanced noise immunity and direct interfacing to logic ICs and low power gate drivers.
|Company||Philips Semiconductors (Acquired by NXP)|
|Datasheet||Download Z0107MA0 datasheet
Planar passivated sensitive gate four quadrant triac SOT54 (TO-92) plastic package intended for use in applications requiring enhanced noise immunity and direct interfacing to logic ICs and low power gate drivers.
Direct interfacing to logic level ICs Enhanced current surge capability Enhanced noise immunity High blocking voltage capability Sensitive gate triggering in four quadrants
General purpose low power motor control Home appliances Industrial process control Low power AC Fan controllers
Table 1. Symbol VDRM ITSM Quick reference data Parameter repetitive peak off-state voltage non-repetitive peak on-state current RMS on-state current full sine wave; Tj(init) = 25 °C; = 20 ms; see Figure 4; see Figure 5 full sine wave; Tlead 38 °C; see Figure 1; see Figure 3; see Figure A; T2+ G+; = 25 °C; see Figure A; T2+ G-; = 25 °C; see Figure A; T2- G-; = 25 °C; see Figure A; T2- G+; = 25 °C; see Figure 7 Conditions Min Typ Max Unit 600 VTable 2. Pin 2 3 Pinning information Symbol Description G T1 main terminal 2 gate main terminal 1
Table 3. Ordering information Package Name Z0107MA0 TO-92 Description plastic single-ended leaded (through hole) package; 3 leads Version SOT54 Type number
Table 4. Symbol VDRM IT(RMS) ITSM Limiting values Parameter repetitive peak off-state voltage RMS on-state current non-repetitive peak on-state current I2t for fusing rate of rise of on-state current full sine wave; Tlead 38 °C; see Figure 1; see Figure 3; see Figure 2 full sine wave; Tj(init) = 25 °C; = 20 ms; see Figure 4; see Figure 5 full sine wave; Tj(init) = 25 °C; ms I2t dIT/dt = 10 ms; sine-wave pulse = 20 mA; dIG/dt = 100 mA/µs; = 20 mA; dIG/dt = 100 mA/µs; T2+ GIT = 20 mA; dIG/dt = 100 mA/µs; T2- GIT = 20 mA; dIG/dt = 100 mA/µs; T2- G+ IGM PGM PG(AV) Tstg Tj peak gate current peak gate power average gate power storage temperature junction temperature over any 20 ms period Conditions Min -40 Max Unit A2s A/µs W °CIn accordance with the Absolute Maximum Rating System (IEC 60134).
All information provided in this document is subject to legal disclaimers.
RMS on-state current as a function of lead temperature; maximum values
RMS on-state current as a function of surge duration; maximum values
Total power dissipation as a function of RMS on-state current; maximum values
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