Details, datasheet, quote on part number: TISP8201MDR
PartTISP8201MDR
CategoryDiscrete => Thyristors => Surge Protectors => Dual Unidirectional Reverse Blocking Thyristor Sur
TitleDual Unidirectional Reverse Blocking Thyristor Sur
DescriptionDual Unidirectional Reverse Blocking Thyristor Surge Protector
CompanyPower Innovations
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Features, Applications

TISP8200M, BUFFERED P-GATE SCR DUAL TISP8201M, BUFFERED N-GATE SCR DUAL COMPLEMENTARY BUFFERED-GATE SCRS FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION

High Performance Protection for SLICs with +ve & -ve Battery Supplies TISP8200M, Negative Overvoltage Protector Wide -90 V Programming Range Low 5 mA max. Gate Triggering Current High -150 mA min. Holding Current TISP8201M, Positive Overvoltage Protector Wide +90 V Programming Range Low -5 mA max. Gate Triggering Current 20 mA min. Holding Current Rated for International Surge Wave Shapes

Surface Mount Small-Outline Package............................................ UL Recognized Components

Description

The TISP8200M/TISP8201M combination has been designed to protect dual polarity supply rail monolithic SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. Protection against negative overvoltages is given by the TISP8200M. Protection against positive overvoltages is given by the TISP8201M. Both parts are in 8-pin smalloutline surface mount packages. The TISP8200M has an array of two buffered P-gate SCRs with a common anode connection. Each SCR cathode and gate has a separate terminal connection. The NPN buffer transistors reduce the gate supply current. In use, the cathodes of the TISP8200M SCRs are connected to the two conductors of the POTS line (see applications information). The gates are connected to the appropriate negative voltage battery feed of the SLIC driving the line conductor pair. This ensures that the TISP8200M protection voltage tracks the SLIC negative supply voltage. The anode of the TISP8200M is connected to the SLIC common.

Device TISP8200M TISP8201M Package D (8-pin Small-Outline) D (8-pin Small-Outline) Carrier Embossed Tape Reeled Embossed Tape Reeled Order TISP8201MDR A2

MAY 1998 - REVISED FEBRUARY 2003 Specifications are subject to change without notice.

Negative overvoltages are initially clipped close to the SLIC negative supply by emitter follower action of the NPN buffer transistor. If sufficient clipping current flows, the SCR will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides, the high holding current of the SCR prevents d.c. latchup. The TISP8201M has an array of two buffered N-gate SCRs with a common cathode connection. Each SCR anode and gate has a separate terminal connection. The PNP buffer transistors reduce the gate supply current. In use, the anodes of the TISP8201M SCRs are connected to the two conductors of the POTS line (see applications information). The gates are connected to the appropriate positive voltage battery feed of the SLIC driving that line pair. This ensures that the TISP8201M protection voltage tracks the SLIC positive supply voltage. The cathode of the TISP8201M is connected to the SLIC common. Positive overvoltages are initially clipped close to the SLIC positive supply by emitter follower action of the PNP buffer transistor. If sufficient clipping current flows, the SCR will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides, the SLIC pulls the conductor voltage down to its normal negative value and this commutates the conducting SCR into a reverse biassed condition.

Absolute Maximum Ratings for 25 C (Unless Otherwise Noted)

Rating Repetitive peak off-state voltage, TISP8200M VGK = 0 Repetitive peak reverse voltage, VGA -70 V Non-repetitive peak on-state pulse current, (see Notes 1 and 10/1000 s (Telcordia/Bellcore GR-1089-CORE, Issue 2, February 1999, Section 5/310 s (ITU-T K.45, K.44 open-circuit voltage wave shape 10/700 s) 2/10 s (Telcordia/Bellcore GR-1089-CORE, Issue 2, February 1999, Section 4) Non-repetitive peak on-state current, 50/60 Hz (see Notes 1, 2 and 900 s Non-repetitive peak gate current, 2/10 s pulse, cathode commoned (see Note 1) Junction temperature Storage temperature range to +150 ITSP -210 A Symbol VDRM VRRM Value -120 120 Unit V

NOTES: 1. Initially, the protector must be in thermal equilibrium with TJ 85 C. The surge may be repeated after the device returns to its initial conditions. 2. These non-repetitive rated currents are peak values. The rated current values may be applied to any cathode-anode terminal pair. Above 85 C, derate linearly to zero 150 C lead temperature. 3. These non-repetitive rated terminal currents are for the TISP8200M and TISP8201M together. Device (A) terminal positive current values are conducted by the TISP8201M and (K) terminal negative current values by the TISP8200M.

Absolute Maximum Ratings for 25 C (Unless Otherwise Noted)

Rating Repetitive peak off-state voltage, VGA = 0 Repetitive peak reverse voltage, VGK 70 V Non-repetitive peak on-state pulse current, (see Notes 1 and 10/1000 s (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 5/310 s (ITU-T K.45, K.44 open-circuit voltage wave shape 10/700 s) 2/10 s (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4) Non-repetitive peak on-state current, 50/60 Hz (see Notes 1, 2 and 900 s Non-repetitive peak gate current, 2/10 s pulse, cathode commoned (see Note 1) Junction temperature Storage temperature range to +150 ITSP 210 A Symbol VDRM VRRM Value 120 -120 Unit V

NOTES: 1. Initially, the protector must be in thermal equilibrium with TJ 85 C. The surge may be repeated after the device returns to its initial conditions. 2. These non-repetitive rated currents are peak values. The rated current values may be applied to any cathode-anode terminal pair. Above 85 C, derate linearly to zero 150 C lead temperature. 3. These non-repetitive rated terminal currents are for the TISP8200M and TISP8201M together. Device (A) terminal positive current values are conducted by the TISP8201M and (K) terminal negative current values by the TISP8200M.

See Figure C1, C2 Gate decoupling capacitor Series resistance for Telcordia GR-1089-CORE first-level and second-level surge survival R1, R2 Series resistance for ITU-T K.20, K.21 and K.45 coordination with 400 V primary protector Min 15 10 Typ 220 20 Max Unit nF


 

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