Details, datasheet, quote on part number: TISP8250DR
CategoryDiscrete => Thyristors => Surge Protectors => Programmable Unidirectional Thyristor Surge Protec
TitleProgrammable Unidirectional Thyristor Surge Protec
DescriptionProgrammable Unidirectional Thyristor Surge Protector
CompanyPower Innovations
DatasheetDownload TISP8250DR datasheet
Cross ref.Similar parts: TPP25011RL
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Features, Applications

Telecommunication System A 10/1000 Protectors Ion-Implanted Breakdown Region - Precise and Stable Voltage


The is a P-gate reverse-blocking thyristor (SCR) designed for the protection of telecommunications equipment against overvoltages and overcurrents on the telephone line caused by lightning, a.c. power contact and induction. The fixed voltage and current triggered modes make the TISP8250 particularly suitable for the protection of ungrounded customer premise equipment. Connected across the d.c. side of a telephone set polarity bridge, in fixed voltage mode these devices can protect the ringer in the on-hook condition. In an off-hook condition, either the fixed voltage or current triggered modes can protect the following telephone electronics. Without external gate activation, the is a fixed voltage protector. The maximum working voltage without clipping 250 V and the protection voltage 340 V. Lower values of protection voltage may be set by connecting an avalanche breakdown diode of less than 250 V between the TISP8250 gate and anode (see Figure 2.) By connecting a small value resistor in series with the line conductor and connecting the TISP8250 gate cathode terminals in parallel with the resistor, conductor overcurrents can gate trigger the TISP8250 into conduction. Overvoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. Overcurrents develop sufficient voltage across the external gate-cathode resistor to trigger the device into a low-voltage on state. This low-voltage on state causes the current resulting from the overstress to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup as the diverted current subsides.

Device TISP8250 Package D, Small-outline Carrier Embossed Tape Reeled Tube Order TISP8250DR TISP8250D

JULY 2000 - REVISED FEBRUARY 2002 Specifications are subject to change without notice.
Absolute Maximum Ratings, 25 C (Unless Otherwise Noted)

Rating Repetitive peak off-state voltage, (see Note 1) Non-repetitive peak on-state pulse current (see Notes 2, 3 and 2/10 s voltage wave shape) 0.2/310 s (CNET 0.5/700 s voltage wave shape) 5/310 s (ITU-T 10/700 s voltage wave shape) 10/700 s voltage wave shape) 10/1000 s voltage wave shape) Non-repetitive peak on-state current (see Notes 2, 3 and ms (50 Hz) half sine wave s (50 Hz) rectified sine wave s (50 Hz) rectified sine wave Junction temperature Storage temperature range NOTES: TJ Tstg ITSM C A IPPSM A Symbol VDRM Value 250 Unit V

For voltage values at lower temperatures derate at 0.13 %/C. Initially, the TISP8250 must be in thermal equilibrium with = 25 C. The surge may be repeated after the TISP8250 returns to its initial conditions. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring track widths. Derate current values at -0.61 %/C for ambient temperatures above 25 C.

Parameter IDRM V(BO) I(BO) IH VGK IGT ID Coff Repetitive peak offstate current Breakover voltage Forward voltage Holding current Gate-cathode voltage Gate trigger current Off-state current Off-state capacitance VD = VDRM dv/dt = 250 V/ms, RSOURCE = 300 dv/dt = 250 V/ms, RSOURCE 5 A, di/dt = -30 mA/ms 30 mA VAK = 60 MHz, 1 V rms, 5 V Test Conditions 85 C Min Typ Max Unit A pF

Parameter RJA Junctio n to free air thermal resistance Test Conditions EIA/JESD51-3 PCB, = 25 C, (see Note 5) Min Typ Max 170 Unit C/W

NOTE 5: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.

Figure 1. Voltage-Current Characteristic for A and K Terminals All Measurements are Referenced to the K Terminal


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