|Category||Discrete => Thyristors => Surge Protectors => Dual Programmable Thyristor Surge Protector|
|Title||Dual Programmable Thyristor Surge Protector|
|Description||Dual Programmable Thyristor Surge Protector|
|Datasheet||Download TISPPBL1DR datasheet
|TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS
PROGRAMMABLE OVERVOLTAGE PROTECTION FOR ERICSSON COMPONENTS SUBSCRIBER LINE INTERFACE CIRCUITS, SLICS
- No internal connection Terminal typical application names shown in parenthesis P PACKAGE (TOP VIEW)- No internal connection Terminal typical application names shown in parenthesis
§ See Applications Information for earlier SLIC types. Use TISPPBL2 when programmed line current is above 55 mAWAVE SHAPE 10/1000 µs STANDARD GR-1089-CORE ITU-T K22 I3124 ITU-T K21 GR-1089-CORE ITSP A
Terminals K1, K2 and A correspond to the alternative line designators T, R and A, B and C. The negative protection voltage is controlled by the voltage, VGG, applied to the G terminal. SD6XAEA
Feed-Through Package Connections - Minimises Inductive Wiring Voltages Surface Mount and Through-Hole Ordering Options
DEVICE CODE TISPPBLxD TISPPBLxDR TISPPBLxP PACKAGE AND CARRIER TYPE 8-pin Small-Outline in a Tube 8-pin Small-Outline on Tape and Reeled 8-pin Plastic DIP in a Tube
Specified Impulse Limiting Voltage - Voltage-Time Envelope Guaranteed - Full 85 °C Temperature Range UL Recognized, E195925
Customers are advised to obtain the latest version of the relevant Ericsson Components SLIC information to verify, before placing orders, that the information being relied on is current.AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice.
TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS
The TISPPBL1 and TISPPBL2 are dual forward-conducting buffered p-gate overvoltage protectors. They are designed to protect the Ericsson Components SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. The TISPPBLx limits voltages that exceed the SLIC supply rail levels. The SLIC line driver section is typically powered by a negative voltage, VBat, in the region -85 V. The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. As the protection voltage will track the negative supply voltage the overvoltage stress on the SLIC is minimised. The TISPPBLx buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then the protector will crowbar into a low voltage ground referenced on-state condition. As the overvoltage subsides the high holding current of the crowbar prevents d.c. latchup. The difference between the TISPPBL1 and TISPPBL2 is the minimum value of holding current. The mA TISPPBL1 can delatch SLIC programmed line currents 55 mA and the mA TISPPBL2 can delatch all programmed line current values. These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. The TISPPBLx is available in 8-pin plastic small-outline surface mount package and 8-pin plastic dual-in-line package.absolute maximum ratings, 85 °C (unless otherwise noted)
RATING Repetitive peak off-state voltage, = 0 Repetitive peak gate-cathode voltage, VKA = 0 Non-repetitive peak on-state pulse current (see Notes 1 and 10/1000 µs (Bellcore GR-1089-CORE, Issue 2, December 1997, Section µs (I3124, open-circuit voltage wave shape 0.5/700 µs) 5/310 µs (ITU-T & K21, open-circuit voltage wave shape 10/700 µs) 1/20 µs (ITU-T K22, open-circuit voltage wave shape 1.2/50 µs) 2/10 µs (Bellcore GR-1089-CORE, Issue 2, December 1997, Section 4) Non-repetitive peak on-state current, 50/60 Hz (see Notes 1 and 900 s Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Note 1) Operating free-air temperature range Junction temperature Storage temperature range IGSM TA TJ Tstg ITSM °C A ITSP A SYMBOL VDRM VGKRM VALUE -100 -90 UNIT V
NOTES: 1. Initially the protector must be in thermal equilibrium with TJ 85 °C. The surge may be repeated after the device returns to its initial conditions. 2. These non-repetitive rated currents are peak values for either polarity. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the rated current value of an individual terminal pair). Above 85 °C, derate linearly to zero 150 °C lead temperature.TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS
SEE Figure R1a R1b Gate decoupling capacitor Series resistance for GR-1089-CORE first-level and second-level surge survival Series resistance for GR-1089-CORE first-level surge survival Series resistance for ITU-T recommendation K20/21 MIN TYP 220 MAX UNIT nF
PARAMETER ID V(BO) t(BR) VF VFRM tFR IH IGAS IGAT Off-state current Breakover voltage Breakdown time Forward voltage Peak forward recovery voltage Forward recovery time Holding current Gate reverse current Gate reverse current, on state Gate reverse current, IGAF IGT VGT CAK NOTE forward conducting state Gate trigger current Gate trigger voltage Anode-cathode offstate capacitance -5 A, tp(g) 20 µs, VGG -5 A, tp(g) 20 µs, VGG = 1 MHz, 25 °C (see Note = 500 µs, VGG VD = VDRM, VGK = 0 TEST CONDITIONS 85 °C MIN TYP MAX 85 °C UNIT µA mA
A, 0.5/700 generator, Figure 3 test circuit (See Figure A, 0.5/700 generator, Figure 3 test circuit (See Figure A, 0.5/700 generator, Figure 3 test circuit (See Figure A, 0.5/700 generator, Figure 3 test circuit (See Figure -1 A, di/dt = 1A/ms, VGG -50 V, VGG = VGKRM, VAK = 500 µs, VGG 1 V V(BR) -50 V
3: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured device terminals are a.c. connected to the guard terminal of the bridge.
PARAMETER RJA Junction to free air thermal resistance TEST CONDITIONS Ptot cm2, FR4 PCB D Package P Package MIN TYP MAX 160 100 UNIT °C/W
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