|Category||Discrete => Thyristors => Surge Protectors => Dual Programmable Thyristor Surge Protector|
|Title||Dual Programmable Thyristor Surge Protector|
|Description||Dual Programmable Thyristor Surge Protector|
|Datasheet||Download TISPPBL2SDR datasheet
|TISPPBL2SD PROGRAMMABLE OVERVOLTAGE PROTECTORS FOR ERICSSON COMPONENTS PBL 3xxx SLICS
OVERVOLTAGE PROTECTION FOR ERICSSON COMPONENTS LINE INTERFACE CIRCUITS
- No internal connection Terminal typical application names shown in parenthesis
WAVE SHAPE 10/1000 µs STANDARD GR-1089-CORE ITU-T K22 I3124 ITU-T K21 GR-1089-CORE ITSP A K2 Terminals K1, K2 and A correspond to the alternative line designators T, R and A, B and C. The negative protection voltage is controlled by the voltage, VGG, applied to the G terminal. SD6XAPSmall Outline Surface Mount Package - Available Ordering Options
Single-Lead Line Connection Version of Feed-Through TISPPBL2D - Ground Lead Creepage Distance. 3 mm
The is a dual forward-conducting buffered p-gate overvoltage protector. It is designed to protect the Ericsson Components PBL 3xxx family of SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. The TISPPBL2S limits voltages that exceed the SLIC supply rail levels. The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region -85 V. The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. As the protection voltage will track the negative supply voltage the overvoltage stress on the SLIC is minimised. Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then the protector will crowbar into a low voltage ground referenced on-state condition. As the overvoltage
Customers are advised to obtain the latest version of the relevant Ericsson Components SLIC information to verify, before placing orders, that the information being relied on is current.AUGUST 1999 - REVISED AUGUST 2002 Specifications are subject to change without notice.
subsides the high holding current of the crowbar prevents d.c. latchup. The TISPPBL2S buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. The TISPPBL2S is the TISPPBL2D with a different pinout. The feed-through Ring (leads 4 5) and Tip (leads 1 8) connections have been replaced by single Ring (lead 4) and Tip (lead 1) connections. This increases package creepage distance of the biased to ground connections from about mm to over 3 mm.
RATING Repetitive peak off-state voltage, TJ 85°C Repetitive peak gate-cathode voltage, VKA TJ 85°C Non-repetitive peak on-state pulse current (see Notes 1 and 10/1000 µs (Bellcore GR-1089-CORE, Issue 1, November 1994, Section µs (I3124, open-circuit voltage wave shape 0.5/700 µs) 5/310 µs (ITU-T & K21, open-circuit voltage wave shape 10/700 µs) 1/20 µs (ITU-T K22, open-circuit voltage wave shape 1.2/50 µs) 2/10 µs (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4) Non-repetitive peak on-state current, 50/60 Hz (see Notes 1 and 900 s Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Note 1) Operating free-air temperature range Junction temperature Storage temperature range IGSM TA TJ Tstg ITSM °C A ITSP A SYMBOL VDRM VGKRM VALUE -100 -90 UNIT V
NOTES: 1. Initially the protector must be in thermal equilibrium with TJ 85 °C. The surge may be repeated after the device returns to its initial conditions. 2. These non-repetitive rated currents are peak values for either polarirty. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the rated current value of an individual terminal pair). Above 85 °C, derate linearly to zero 150 °C lead temperature.
MIN CG R1 Gate decoupling capacitor TISPPBL2S series resistor for GR-1089-CORE first-level and second-level surge survival TISPPBL2S series resistor for GR-1089-CORE first-level surge survival TISPPBL2S series resistor for ITU-T recommendation K20/21 TYP 220 MAX UNIT nFelectrical characteristics, Tamb 25 °C (unless otherwise noted)
PARAMETER ID Off-state current VD = VDRM, VGK = 0 TEST CONDITIONS 85 °C MIN TYP MAX -5 -50 UNIT µA
electrical characteristics, Tamb 25 °C (unless otherwise noted) (continued)
PARAMETER V(BO) t(BR) VF VFRM tFR IH IGAS IGAT Breakover voltage Breakdown time Forward voltage Peak forward recovery voltage Forward recovery time Holding current Gate reverse current Gate reverse current, on state Gate reverse current, IGAF IGT VGT CAK forward conducting state Gate trigger current Gate trigger voltage Anode-cathode offstate capacitance -5 A, tp(g) 20 µs, VGG -5 A, tp(g) 20 µs, VGG = -50 MHz, = 0, (see Note = 500 µs, VGG -10 mA Figure A, 0.5/700 generator, Figure 3 test circuit (See Note 3 and Figure A, 0.5/700 generator, Figure 3 test circuit (See Note 4 and Figure A, 0.5/700 generator, Figure 3 test circuit (See Note 4 and Figure 85 °C V(BR) -50 V TEST CONDITIONS A, 0.5/700 generator, Figure 3 test circuit (See Note 3 and MIN TYP MAX UNIT µA mA
NOTES: 3. For the required TIPX and RINGX terminal negative pulse performance refer to the respective Ericsson Components SLIC data sheet. The PBL 379x family of SLICs has ratings -120 V for 0.25 µs, -90 V for 1 µs, -70 V for 10 ms and -70 V for d.c. The PBL 376x family together with the PBL 3860A SLIC have the same maximum ratings when the applied battery voltage V. As the FLEXI-SLICTM PBL 386 xx family is specified in terms of current pulses, a minimum value of 2 for RP should be used. Compliance to these conditions is guaranteed by the maximum breakover voltage and the breakdown times of the TISPPBL2S. 4. For the required TIPX and RINGX terminal positive pulse performance refer to the respective Ericsson Components SLIC data sheet. The PBL 379x family of SLICs has ratings 15 V for 0.25 µs, 10 V for 1 µs, 5 V for 10 ms and 1 V for d.c. The PBL 376x family together with the PBL 3860A SLIC have similar ratings. As the FLEXI-SLICTM PBL 386 xx family is specified in terms of current pulses, a minimum value of 2 for RP should be used. Compliance to these conditions is guaranteed by the peak forward recovery voltage and the forward recovery times of the TISPPBL2S 5. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured device terminals are a.c. connected to the guard terminal of the bridge.
PARAMETER RJA Junction to free air thermal resistance TEST CONDITIONS Ptot cm2, FR4 PCB D Package MIN TYP MAX 160 UNIT °C/W
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