Details, datasheet, quote on part number: S3C8982
PartS3C8982
CategoryCommunication => Security & Smart Card => Smart Card Controller
DescriptionDescription = S3C2500A ;; Function = ARM940T 166MHz,2 Ethernet Mac USB,HDLC,UART,IIC,DES/3DES ;; Package = 272PBGA ;; Production Status = Mass Production ;; Rtos Support = V,l,n ;; User's Manual = Now
CompanySamsung Semiconductor, Inc.
DatasheetDownload S3C8982 datasheet
  

 

Features, Applications

Semiconductor Flash Memory Product Planning & Applications

Revision No. 0.0 Initial Draft History Draft Date Jan. 0.1 1.On page 18, BSC is moved from bufferRAM Write Protection command register to system configuration register and bufferRAM Write Protection command register is removed. 2. Host Interface & NAND Flash Interface (page / 3.0V Mar. 13 2002

1. Package information is added. 2. Some description is updated. 3. Controller ID register default value is modified. (Page 14) 4. Write Protection NAND Flash commands are changed, and description are updated.(Page 23, 56)

1. Package pin configuration changed.(page9) 2. Software algorithm of detecting NAND Flash type is added. (page : 11 bit of system configuration register is changed from `reserved' to `CE2Ena'.

1. Minimum latency at sync. Read is changed from 3clocks 2. Technical notes are added - Write Protection truth table is updated(page 58) - Write Protection guidance is updated(page 58) - Internal register reset case is updated(page 61) - Pin connection guidance between Host and Eagle (page 61) - Asynchronous Page Read guidance (page 62) 3. DC/AC parameter : 1 release parameter 4. tASC parameter is removed. tAES parameter is added

4. Package dimension information is updated (page63~64) 5. Some descriptions are modified & added 0.5 1. Vcc is available on 1.8V and 2.5V part. 2. Pin J2 is changed from NC to DNU. 3. Fig30(State diagram of NAND Flash Write Protection) is updated.(page ) 4. Internal Register reset case table is updated (page 5. DC parameter is updated for 2.5V part (page 66~67) 6. Erratas and walk-around methods added (page 73~76) 7. Default value of Interrupt Status Register(1442h) is changed from to 8000h, which is not the silicon revision but definition change.(refer to Internal Regitster reset case table) (page 22) 9. Controller ID register value is updated from to 1202h (page 10. AC parameters are updated (page 65~66) tCES, tIACC are added in Sync. Read. tVLWL is removed in Async. Write. tAVA is removed. tCS is added in Async. Write. 1.0 Spec. is finalized Jul. 16 2003


 

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