|Category||Unsorted => VIPower (Vertical Intelligent Power)|
|Title||VIPower (Vertical Intelligent Power)|
|Description||"OMNIFET" Fully Autoprotected Power MOSFET|
|Company||ST Microelectronics, Inc.|
|Datasheet||Download K10N07FM datasheet
LINEAR CURRENT LIMITATION THERMAL SHUT DOWN SHORT CIRCUIT PROTECTION INTEGRATED CLAMP LOW CURRENT DRAWN FROM INPUT PIN DIAGNOSTIC FEEDBACK THROUGH INPUT PIN ESD PROTECTION DIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING) COMPATIBLE WITH STANDARD POWER MOSFET
DESCRIPTION The VNK10N07FM, VNP10N07FI and VNV10N07 are monolithic devices made using STMicroelectronics VIPower M0 Technology, intended for replacement of standard power MOSFETS to 50 KHz applications. Built-in thermal shut-down, linear current limitation and overvoltage clamp protect BLOCK DIAGRAM
the chip in harsh enviroments. Fault feedback can be detected by monitoring the voltage at the input pin.
Symbol Parameter IR V esd P tot Tc T stg Drain-source Voltage = 0) Input Voltage Drain Current Reverse DC Output Current Electrostatic Discharge (C= 100 pF, K ) Total Dissipation o C Operating Junction Temperature Case Operating Temperature Storage Temperature 50 Value 31 WInternally Clamped 18 Internally Limited 2000 9.5 Internally Limited Internally Limited to 150
ISOWATT220 R thj-case Thermal Resistance Junction-case R thj-amb Thermal Resistance Junction-ambient Max 2.5 62.5ELECTRICAL CHARACTERISTICS (Tcase 25 oC unless otherwise specified) OFF
Symbol V CLAMP V CLTH V INCL I DSS II SS Parameter Drain-source Clamp Voltage Drain-source Clamp Threshold Voltage Input-Source Reverse Clamp Voltage Zero Input Voltage Drain Current = 0) Supply Current from Input Pin Test Conditions = 0 Min. Typ. 70 Max. 80 Unit V µA
Symbol V IN(th) R DS(on) Parameter Input Threshold Voltage Static Drain-source On Resistance DS = Vin Test Conditions 1 mA Min. 0.8 Typ. Max. 0.1 0.14 Unit V
Symbol ) C oss Parameter Forward Transconductance Output Capacitance Test Conditions 13 V VDS V ID MHz = 0 Min. 6 Typ. 350 500 Max. Unit S pF
Symbol t d(on) tr t d(off) tf t d(on) tr t d(off) tf (di/dt) on Qi Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Current Slope Total Input Charge Test Conditions 15 V gen 10 V (see figure 15 V gen 10 V (see figure V Id gen = 10 Min. Typ. Max. Unit s nC
Symbol ) I RRM ( ) Parameter Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current 5 A Test Conditions 5 A di/dt o C (see test circuit, figure 5) Min. Typ. Max. 1.6 Unit µC A
Symbol I lim t dlim ) T jsh ) T jrs ( ) Parameter Drain Current Limit Step Response Current Limit Overtemperature Shutdown Overtemperature Reset Fault Sink Current Single Pulse Avalanche Energy 13 VPulsed: Pulse duration = 300 µs, duty cycle 1.5 % Parameters guaranteed by design/characterization
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