Details, datasheet, quote on part number: M68AF511AM70MC1U
PartM68AF511AM70MC1U
Category
Description4 Mbit (512K X8) 5.0V Asynchronous SRAM
CompanyST Microelectronics, Inc.
DatasheetDownload M68AF511AM70MC1U datasheet
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Features, Applications

x 8 bits SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIMES: 55ns LOW STANDBY CURRENT LOW VCC DATA RETENTION: 2V TRI-STATE COMMON I/O LOW ACTIVE and STANDBY POWER

TABLE OF CONTENTS SUMMARY DESCRIPTION. 3 Figure 2. Logic Diagram. Table 1. Signal Names. Figure 3. TSOP and SO Connections. Figure 4. Block Diagram.....................................................................................................................................................................

MAXIMUM RATING. 5 Table 2. Absolute Maximum Ratings. 5 DC AND AC PARAMETERS. 6 Table 3. Operating and AC Measurement Conditions. 6 Figure 5. AC Measurement I/O Waveform. 6 Figure 6. AC Measurement Load Circuit. 6 Table 4. Capacitance. 7 Table 5. DC Characteristics. 7 OPERATION. 8 Table 6. Operating Modes. 8 Read Mode. 8 Figure 7. Address Controlled, Read Mode AC Waveforms. 8 Figure 8. Chip Enable or Output Enable Controlled, Read Mode AC Waveforms. 9 Table 7. Read and Standby Mode AC Characteristics. 10 Write Mode. 11 Figure 10. Write Enable Controlled, Write AC Waveforms. 11 Figure 11. Chip Enable Controlled, Write AC Waveforms. 12 Table 8. Write Mode AC Characteristics. 12 Table 9. Low V CC Data Retention Characteristics. 13 PACKAGE MECHANICAL. 14 TSOP 32 Type - 32 lead Plastic Thin Small Outline Type II, Package Outline. 14 TSOP 32 Type - 32 lead Plastic Thin Small Outline Type II, Package Mechanical Data. - 32 lead Plastic Small Outline, Package Outline. - 32 lead Plastic Small Outline, Package Mechanical Data. 15 PART NUMBERING. 16 Table 12. Ordering Information Scheme. 1 6 REVISION HISTORY. 17 Table 13. Document Revision History. 17

SUMMARY DESCRIPTION The a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 524,288 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single to 5.5V supply.

This device has an automatic power-down feature, reducing the power consumption by over 99% when deselected. The M68AF511A is available a 32 lead TSOP Type II and 32 lead SO packages.

A0-A18 DQ0-DQ7 Address Inputs Data Input/Output Chip Enable Output Enable Write Enable Supply Voltage Ground


 

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