Details, datasheet, quote on part number: M68AR128ML70ZB6E
PartM68AR128ML70ZB6E
Category
Description2 Mbit (128K X16) 1.8V Asynchronous SRAM
CompanyST Microelectronics, Inc.
DatasheetDownload M68AR128ML70ZB6E datasheet
  

 

Features, Applications

x 16 bits SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIME: 55ns SINGLE BYTE READ/WRITE LOW STANDBY CURRENT LOW VCC DATA RETENTION: 1.0V TRI-STATE COMMON I/O AUTOMATIC POWER DOWN

TABLE OF CONTENTS SUMMARY DESCRIPTION. 3 Figure 2. Logic Diagram. 3 Table 1. Signal Names. 3 Figure 3. TFBGA Connections (Top view through package). 4 Figure 4. Block Diagram. 5 MAXIMUM RATING. 5 Table 2. Absolute Maximum Ratings. 5 DC and AC PARAMETERS. 6 Table 3. Operating and AC Measurement Conditions. 6 Figure 5. AC Measurement I/O Waveform. 6 Figure 6. AC Measurement Load Circuit. 6 Table 4. Capacitance. 7 Table 5. DC Characteristics. 7 OPERATION. 8 Table 6. Operating Modes. 8 Read Mode. 8 Figure 7. Address Controlled, Read Mode AC Waveforms. 8 Figure 8. Chip Enable or Output Enable Controlled, Read Mode AC Waveforms. 9 Figure 9. Chip Enable or UB/LB Controlled, Standby Mode AC Waveforms. 9 Table 7. Read and Standby Mode AC Characteristics. 10 Write Mode. 11 Figure 10. Write Enable Controlled, Write AC Waveforms. 11 Figure 11. Chip Enable Controlled, Write AC Waveforms. 12 Table 8. Write Mode AC Characteristics. 13 Figure 13. Low VCC Data Retention AC Waveforms. 14 Table 9. Low VCC Data Retention Characteristics. 14 PACKAGE MECHANICAL. - 6x8 ball array, 0.75 mm pitch, Bottom View Package Outline. - 6x8 ball array, 0.75 mm pitch, Package Mechanical Data. 15 PART NUMBERING. 16 Table 11. Ordering Information Scheme. 1 6 REVISION HISTORY. 17 Table 12. Document Revision History. 17

SUMMARY DESCRIPTION The a 2 Mbit (2,097,152 bit) CMOS SRAM, organized as 131,072 words by 16 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 1.8V (150mV) supply. This device has an

automatic power-down feature, reducing the power consumption by over 99% when deselected. The M68AR128M is available (0.75 mm pitch) package.

A0-A16 Address Inputs Data Input/Output Chip Enable Output Enable Write Enable Upper Byte Enable Input Lower Byte Enable Input Supply Voltage Ground Not Connected Internally Don't Use as Internally Connected


 

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