Details, datasheet, quote on part number: M68AW031A
PartM68AW031A
CategoryMemory => SRAM => Async. SRAM => Low Power Asynchronous
TitleLow Power Asynchronous
Description256 Kbit (32K X8) 3.0V Asynchronous SRAM
CompanyST Microelectronics, Inc.
DatasheetDownload M68AW031A datasheet
  

 

Features, Applications

x 8 bits SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIME: 70ns LOW STANDBY CURRENT LOW VCC DATA RETENTION: 1.5V TRI-STATE COMMON I/O AUTOMATIC POWER DOWN

TABLE OF CONTENTS SUMMARY DESCRIPTION. 3 Figure 2. Logic Diagram. 3 Table 1. Signal Names. 3 Figure 3. SO Connections. 4 Figure 4. TSOP Connections (Reverse). 4 Figure 5. TSOP Connections (Normal). 4 Figure 6. Block Diagram. 5 MAXIMUM RATING. 5 Table 2. Absolute Maximum Ratings. 5 DC AND AC PARAMETERS. 6 Table 3. Operating and AC Measurement Conditions. 6 Figure 7. AC Measurement I/O Waveform. 6 Figure 8. AC Measurement Load Circuit. 6 Table 4. Capacitance. 7 Table 5. DC Characteristics. 7 OPERATION. 8 Table 6. Operating Modes. 8 Read Mode. 8 Figure 9. Address Controlled, Read Mode AC Waveforms. 8 Figure 10. Chip Enable or Output Enable Controlled, Read Mode AC Waveforms. 9 Figure 11. Chip Enable Controlled, Standby Mode AC Waveforms. 9 Table 7. Read and Standby Mode AC Characteristics. 10 Write Mode. 11 Figure 12. Write Enable Controlled, Write AC Waveforms. 11 Figure 13. Chip Enable Controlled, Write AC Waveforms. 12 Table 8. Write Mode AC Characteristics. 13 Figure 14. Low V CC Data Retention AC Waveforms. 14 Table 9. Low V CC Data Retention Characteristics. 14 PACKAGE MECHANICAL. - 28 lead Plastic Small Outline, 300 mils body width, Package Outline. - 28 lead Plastic Small Outline, 300 mils body width, Package Mechanical Data. - 28 lead Normal and Reverse Pinout Plastic Small Outline, Package Outline. - 28 lead Normal and Reverse Pinout Plastic Small Outline, Package Mechanical Data. 16 PART NUMBERING. 17 Table 12. Ordering Information Scheme. 17 REVISION HISTORY. 18 Table 13. Document Revision History. 18

SUMMARY DESCRIPTION The a 256 Kbit (262,144 bit) CMOS SRAM, organized as 32,768 bytes by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single to 3.6V supply. This device has an au-

tomatic power-down feature, reducing the power consumption by over 99% when deselected. The M68AW031A is available SO28 (28-lead Small Outline) and TSOP28 (28-lead Thin Small Outline, Standard and Reverse Pinout) packages.

A0-A14 Address Inputs Data Input/Output Chip Enable Output Enable Write Enable Supply Voltage Ground


 

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