Details, datasheet, quote on part number: M68AW127B
PartM68AW127B
CategoryMemory => SRAM => Async. SRAM => Low Power Asynchronous
TitleLow Power Asynchronous
Description1 Mbit (128K X8), 3.0V Asynchronous SRAM
CompanyST Microelectronics, Inc.
DatasheetDownload M68AW127B datasheet
Cross ref.Similar parts: CY62128DV30LL-70ZAIT
  

 

Features, Applications

x 8 bits SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIMES: 70ns LOW STANDBY CURRENT LOW VCC DATA RETENTION: 1.5V TRI-STATE COMMON I/O LOW ACTIVE and STANDBY POWER

TABLE OF CONTENTS SUMMARY DESCRIPTION. 3 Figure 2. Logic Diagram. 3 Figure 5. Block Diagram. 5 Figure 3. SO Connections. 4 Figure 4. TSOP Connections. 4 Figure 5. Block Diagram. 5 MAXIMUM RATING. 5 Table 2. Absolute Maximum Ratings. 5 DC AND AC PARAMETERS. 6 Table 3. Operating and AC Measurement Conditions. 6 Figure 6. AC Measurement I/O Waveform. 6 Figure 7. AC Measurement Load Circuit. 6 Table 4. Capacitance. 7 Table 5. DC Characteristics. 7 OPERATION. 8 Table 6. Operating Modes. 8 Read Mode. 8 Figure 8. Address Controlled, Read Mode AC Waveforms. 8 Figure 9. Chip Enable or Output Enable Controlled, Read Mode AC Waveforms. 9 Table 7. Read and Standby Mode AC Characteristics. 10 Write Mode. 11 Figure 11. Write Enable Controlled, Write AC Waveforms. 11 Figure 12. Chip Enable Controlled, Write AC Waveforms. 12 Table 8. Write Mode AC Characteristics. 13 Figure 13. E1 Controlled, Low VCC Data Retention AC Waveforms. 14 Figure 14. E2 Controlled, Low VCC Data Retention AC Waveforms. 14 Table 9. Low VCC Data Retention Characteristics. 14 PACKAGE MECHANICAL. - 32 lead Plastic Small Outline, Package Outline. - 32 lead Plastic Small Outline, Package Mechanical Data. - 32 lead Plastic Small Outline 8x20mm, Package Outline. - 32 lead Plastic Small Outline 8x20mm, Package Mechanical Data. - 32 lead Plastic Small Outline 8x13.4mm, Package Outline. - 32 lead Plastic Small Outline 8x13.4mm, Package Mechanical Data. 17 PART NUMBERING. 18 Table 13. Ordering Information Scheme. 18 REVISION HISTORY. 19 Table 14. Document Revision History. 19

SUMMARY DESCRIPTION The 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single to 3.6V supply.

This device has an automatic power-down feature, reducing the power consumption by over 99% when deselected. The M68AW127B is available TSOP32 8x20mm and TSOP32 8x13.4mm packages.

A0-A16 Address Inputs Data Input/Output Chip Enable Chip Enable Output Enable Write Enable Supply Voltage Ground


 

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