Details, datasheet, quote on part number: SN74ALS236DW
Description64 4 Asynchronous First-in, First-out Memory
CompanyTexas Instruments, Inc.
DatasheetDownload SN74ALS236DW datasheet
Find where to buy


Features, Applications

Asynchronous Operation Organized as 64 Words by 4 Bits Data Rates to 30 MHz 3-State Outputs Package Options Include Plastic Small-Outline Package (DW), Plastic J-Leaded Chip Carriers (FN), and Standard Plastic 300-mil DIPs (N)


The a 256-bit memory utilizing advanced low-power Schottky IMPACTTM technology. It features high speed with fast fall-through times and is organized as 64 words by 4 bits. A first-in, first-out (FIFO) memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ALS236 is designed to process data at rates to 30 MHz in a bit-parallel format, word by word.

Data is written into memory on the rising edge of the shift-in (SI) input. When SI goes low, the first data word ripples through to the output (see Figure 1). As the FIFO fills up, the data words No internal connection stack up in the order they were written. When the FIFO is full, additional shift-in pulses have no effect. Data is shifted out of memory on the falling edge of the shift-out (SO) input (see Figure 2). When the FIFO is empty, additional SO pulses have no effect. The last data word remains at the outputs until a new word falls through or reset (RST) goes low. Status of the SN74ALS236 FIFO memory is monitored by the output-ready (OR) and input-ready (IR) flags. When OR is high, valid data is available at the outputs. OR is low when SO is high and stays low when the FIFO is empty. IR is high when the inputs are ready to receive more data. IR is low when SI is high and stays low when the FIFO is full. When the FIFO is empty, input data is shifted to the output automatically when SI goes low. SO is held high during this time, the OR flag pulses high, indicating valid data at the outputs (see Figure 3). When the FIFO is full, data is shifted in automatically by holding SI high and taking SO low. One propagation delay after SO goes low, IR goes high. SI is still high when IR goes high, data at the inputs is automatically shifted in. Since IR is normally low when the FIFO is full and SI is high, only a high-level pulse is seen on the IR output (see Figure 4).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. IMPACT is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

The FIFO must be reset after power up with a low-level pulse on the master reset (RST) input. This sets IR high and OR low, signifying that the FIFO is empty. Resetting the FIFO sets the outputs to a low logic level (see Figure SI is high when RST goes high, the input data is shifted in and IR goes low and remains low until SI goes low. If SI goes low before RST goes high, the input data is not shifted in and IR goes high. Data outputs are noninverting with respect to the data inputs. The SN74ALS236 is characterized for operation from to 70C.

This symbol is in accordance with ANSI/IEEE Standard 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW and N packages.


Related products with the same datasheet
Some Part number from the same manufacture Texas Instruments, Inc.
SN74ALS236FN 64 4 Asynchronous First-in, First-out Memory
SN74ALS236N ti SN74ALS236, 64 X 4 Asynchronous Fifo Memory
SN74ALS240A Octal Buffer/driver With 3-state Outputs
SN74ALS240A-1DBR ti SN74ALS240A-1, Octal Buffer/bus Drivers
SN74ALS240ADW ti SN74ALS240A, Octal Buffers/drivers With 3-State Outputs
SN74ALS241A-1DW ti SN74ALS241A, Octal Buffers/drivers With 3-State Outputs
SN74ALS241BDW ti SN74ALS241B, Octal Buffers/drivers With 3-State Outputs
SN74ALS241C Octal Buffers/drivers With 3-state Outputs
SN74ALS241C-1DW ti SN74ALS241C, Octal Buffers/drivers With 3-State Outputs
SN74ALS243A Quad Bus Transceivers With 3-state Outputs
SN74ALS243A-1N ti SN74ALS243A, Quadruple Bus Transceivers With 3-State Outputs
SN74ALS244A-1N ti SN74ALS244A, Octal Buffers/line Drivers With 3-State Outputs
SN74ALS244BDBLE ti SN74ALS244B, Octal Buffers/line Drivers With 3-State Outputs
Same catergory

28F004S3 : Byte-wide Smart 3 Flashfile(tm) Memory Family 4mb. SmartVoltage Technology 2.7 V (Read-Only) 3.3 V VCC and 12 V VPP High-Performance 120 ns Read Access Time Enhanced Data Protection Absolute Protection with PP = GND Flexible Block Locking Block Write Lockout during Power Transitions Enhanced Automated Suspend Options Program Suspend to Read Block Erase Suspend to Program Block Erase Suspend to Read.

BR24C21 : . The BR24C21 series are 1kbits serial EEPROMs and support DDC1TM and DDC2TM interfaces for PLUG&PLAY displays. ! x 8 bits serial EEPROM 2) Operating voltage range (2.5V5.5V) 3) Completely implements / DDC2TM interface for monitor identification Transmit-Only Mode Recovery Mode Bi-directional Mode 4) Page write function : 8 bytes 5) Low current consumption.

CY7C225A : 4K. 512 X 8 Registered Prom. CMOS for optimum speed/power High speed 18 ns address set-up 12 ns clock to output Low power 495 mW (commercial) 660 mW (military) Synchronous and asynchronous output enables On-chip edge-triggered registers Buffered common PRESET and CLEAR inputs EPROM technology, 100% programmable Slim 300-mil, 24-pin plastic or hermetic DIP, 28-pin LCC, or 28-pin.

GS8160F18 : Sychronous Burst. GS8160F18/32/36T-5.5/6/6.5/7/7.5/8.5 100-Pin TQFP Commercial Temp Industrial Temp Flow Through mode operation; Pin = No Connect V +10%/10% core power supply 3.3 V I/O supply LBO pin for Linear or Interleaved Burst mode Internal input resistors on mode pins allow floating mode pins Byte Write (BW) and/or Global Write (GW) operation Internal self-timed.

HYS64V32200GU-8 : 3.3 V 16m X 64/72-bit Sdram Modules 3.3 V 32m X 64/72-bit Sdram Modules 3.3 V 64m X 64/72-bit Sdram Modules.

K6F4016R6E : = K6F4016R6E 256K X 16bit Super Low Power And Low Voltage Full CMOS Static RAM ;; Organization = 256Kx16 ;; Vcc(V) = 1.65~2.20 ;; Speed-tAA(ns) = 70,85 ;; Operating Temperature = i ;; Operating Current(mA) = 2 ;; Standby Current(uA) = 0.5 ;; Package = 48TBGA ;; Production Status = Mass Production ;; Comments = -.

K9F1G16U0M : 1G bit. = K9F1G16U0M 64M X 16 Bit NAND Flash Memory ;; Organization = 64Mx16 ;; Operating Voltage(V) = 2.7~3.6 ;; Temperature = C,i ;; Speed(ns) = 50 ;; Package = 48TSOP1 ;; Production Status = Mass Production ;; Comments = 0.12um.

M5M5V108DFP-70H : . Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory.

MBM29DS163BE10 : Super Low Voltage Single 2V. 2M * 8, 1M * 16. The is 16 M-bit, 1.8 V-only Flash memory organized 2 M bytes of 8 bits each 1 M words of 16 bits each. The device is offered in 48-pin TSOP (1) and 48-ball FBGA packages. This device is designed to be programmed in system with standard system 1.8 V VCC supply. 12.0 V VPP and 5.0 V VCC are not required for write or erase operations. The device can also.

V53C8126L : Asynchronous->3.3V FPM. Ultra-high Performance, 3.3v Fast Page Mode CMOS Dynamic RAM: 128kx8.

CAT64LC40L : 256 X 16 SPI BUS SERIAL EEPROM, PDIP8. s: Density: 4 kbits ; Number of Words: 256 k ; Bits per Word: 16 bits ; Bus Type: Serial ; Production Status: Full Production ; Data Rate: 1 MHz ; Logic Family: CMOS ; Supply Voltage: 4.5 ; Package Type: ROHS COMPLIANT, PLASTIC, DIP-8, DIP ; Pins: 8 ; Operating Range: Commercial ; Operating Temperature: 0 to 70 C (32 to 158 F).

IDT72510L40J8 : 1K X 9 BI-DIRECTIONAL FIFO, 40 ns, PQCC52. s: Memory Category: FIFO ; Density: 9 kbits ; Number of Words: 1 k ; Bits per Word: 9 bits ; Package Type: PLASTIC, LCC-52 ; Pins: 52 ; Supply Voltage: 5V ; Access Time: 40 ns ; Cycle Time: 50 ns ; Operating Temperature: 0 to 70 C (32 to 158 F).

MT9KSF12872AZ-1G1XX : DDR DRAM MODULE. s: Memory Category: DRAM Chip. DDR3L functionality and operations supported as defined in the component data sheet 240-pin, unbuffered dual in-line memory module (UDIMM) Fast data transfer rates: 1GB (128 Meg 2GB (256 Meg x 72) VDD 1.35V (1.2831.45V) VDD 1.5V (1.4251.575V) Backward compatible 1.5V 0.075V VDDSPD = 3.03.6V Supports ECC error detection and correction Nominal and dynamic.

S29GL01GS11TFIV20 : 128M X 8 FLASH 2.7V PROM, 110 ns, PDSO56. s: Memory Category: Flash, PROM ; Density: 1024459 kbits ; Number of Words: 128000 k ; Bits per Word: 8 bits ; Package Type: TSOP, 14 X 20 MM, LEAD FREE, MO-142BEC, TSOP-56 ; Pins: 56 ; Logic Family: CMOS ; Supply Voltage: 3V ; Access Time: 110 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F).

W25Q40BWSNIP : 4M X 1 SPI BUS SERIAL EEPROM, PDSO8. s: Memory Category: Flash, PROM ; Density: 4194 kbits ; Number of Words: 4000 k ; Bits per Word: 1 bits ; Package Type: SOIC, 3.81 MM, GREEN, PLASTIC, SOIC-8 ; Pins: 8 ; Supply Voltage: 1.8V ; Data Rate: 50 MHz ; Operating Temperature: -40 to 85 C (-40 to 185 F).

W949D2CBJX5I : 16M X 32 DDR DRAM, 5 ns, PBGA90. s: Memory Category: DRAM Chip ; Density: 536871 kbits ; Number of Words: 16000 k ; Bits per Word: 32 bits ; Package Type: 8 X 13 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-90 ; Pins: 90 ; Supply Voltage: 1.8V ; Access Time: 5 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F).

7P096FLF1200C20 : 48M X 16 FLASH 3V PROM CARD, 200 ns, XMA68. s: Memory Category: Flash, PROM ; Density: 805306 kbits ; Number of Words: 48000 k ; Bits per Word: 16 bits ; Package Type: CARD-68 ; Pins: 68 ; Supply Voltage: 3.3V ; Access Time: 200 ns ; Operating Temperature: 0 to 70 C (32 to 158 F).

0-C     D-L     M-R     S-Z