|Category||Semiconductors => Logic => Buffer/Driver/Transceiver => Inverting Buffer/Driver|
|Part family||SN74ALS240A Octal Buffers/Drivers With 3-State Outputs|
|Title||Inverting Buffers and Drivers|
|Description||Octal Buffers/Drivers With 3-State Outputs 20-SO 0 to 70|
|Company||Texas Instruments, Inc.|
|Datasheet||Download SN74ALS240ANSR datasheet
|Cross ref.||Similar parts: DM74ALS240ASJ|
|Operating Temperature Range(C)||0 to 70|
|Output Drive (IOL/IOH)(Max)(mA)||-15/24|
|tpd @ Nom Voltage(Max)(ns)||9|
|F @ Nom Voltage(Max)(Mhz)||75|
|ICC @ Nom Voltage(Max)(mA)||0.023|
|Approx. Price (US$)||0.37 | 1ku|
|Pin nb||Package type||Ind std||JEDEC code||Package qty||Carrier||Device mark||Width (mm)||Length (mm)||Thick (mm)||Pitch (mm)|
|• Advanced Schottky (ALS and AS) Logic Families
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using | Doc
3-State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading
These octal buffers/drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. When these devices are used with the 'AS241A, 'ALS244, and 'AS244A devices, the circuit designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs. These devices feature high fan-out and improved fan-in. The -1 version SN74ALS240A is identical to the standard version, except that the recommended maximum IOL for the -1 version is 48 mA. There no -1 version of the SN54ALS240A.
TA PACKAGE ORDERABLE PART NUMBER SN74ALS240AN PDIP N Tube Tape and reel to 70°C SOIC DW Tube Tape and reel Tube Tape and reel SOP NS SSOP DB Tape and reel Tape and reel SN74ALS240A-1NSR SN74ALS240ADBR TOP-SIDE MARKING ALS240A-1 G240A
SN74ALS240A-1DBR G240A-1 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
TA CDIP to 125°C CFP W LCCC FK PACKAGE Tube ORDERABLE PART NUMBER SNJ54ALS240AFK SNJ54AS240AFK TOP-SIDE MARKING SNJ54AS240AW SNJ54ALS240AFK
SNJ54AS240AFK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each buffer) INPUTS OE OUTPUT
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC. 7 V Input voltage, VI. 7 V Voltage applied to a disabled 3-state output. 5.5 V Package thermal impedance, JA (see Note 1): DB package. 70°C/W DW package. 58°C/W N package. 70°C/W NS package. 60°C/W Storage temperature range, Tstg. to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
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