Details, datasheet, quote on part number: SN74ALS273
CategorySemiconductors => Logic => Flip-Flop/Latch/Register => D-Type Flip-Flop
Part familySN74ALS273 Octal D-Type Positive-Edge-Triggered Flip-Flops With Clear
TitleBipolar->ALS Family
DescriptionOctal D-Type Positive-Edge-Triggered Flip-Flops With Clear 20-SOIC 0 to 70
CompanyTexas Instruments, Inc.
DatasheetDownload SN74ALS273 datasheet
Cross ref.Similar parts: SN74LS273DW, SN74LS793J, SN74LS793N, SN74LS273DWR2, SN74LS273JD, SN74LS273JDS, SN74LS273JS, SN74LS273M, SN74LS273MEL, SN74LS273MR1
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Operating Temperature Range(C)0 to 70
3-State OutputNo
Technology FamilyALS
F @ Nom Voltage(Max)(Mhz)70
Schmitt TriggerNo
Output Drive (IOL/IOH)(Max)(mA)24/-2.6
Package GroupPDIP,SO,SOIC
ICC @ Nom Voltage(Max)(mA)29
Approx. Price (US$)0.42 | 1ku
tpd @ Nom Voltage(Max)(ns)15
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
20DWSOICR-PDSO-G25TUBEALS273 7.512.82.351.27
Application notes
• Advanced Schottky (ALS and AS) Logic Families
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using | Doc


Features, Applications

Contain Eight Flip-Flops With Single-Rail Outputs Buffered Clock and Direct-Clear Inputs Individual Data Input to Each Flip-Flop Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs


These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear (CLR) input. Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output. The SN54ALS273 is characterized for operation over the full military temperature range to 125°C. The SN74ALS273 is characterized for operation from to 70°C.


PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, VCC. 7 V Input voltage, VI. 7 V Operating free-air temperature range, TA: to 70°C Storage temperature range. to 150°C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

SN54ALS273 MIN VCC VIH VIL IOH IOL fclock tw Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Clock frequency CLR low Pulse duration CLK high CLK low tsu th TA Set p time before CLK Setup Hold time, data after CLK Operating free-air temperature Data CLR inactive state °C ns NOM 5 MAX 5.5 SN74ALS273 MIN NOM 5 MAX 5.5 UNIT V mA MHz

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

mA All typical values are at VCC = 25°C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.


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