|Category||Semiconductors => Logic => Flip-Flop/Latch/Register => D-Type Flip-Flop|
|Part family||SN74ALS29823 9-Bit Bus Interface Flip-Flops With 3-State Outputs|
|Title||D-Type (3-State) Flip-Flops|
|Description||9-Bit Bus Interface Flip-Flops With 3-State Outputs 24-SOIC 0 to 70|
|Company||Texas Instruments, Inc.|
|Datasheet||Download SN74ALS29823DW datasheet
|Pin nb||Package type||Ind std||JEDEC code||Package qty||Carrier||Device mark||Width (mm)||Length (mm)||Thick (mm)||Pitch (mm)|
|• Advanced Schottky (ALS and AS) Logic Families
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using | Doc
Functionally Equivalent to AMD's AM29823 Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With Parity Outputs Have Undershoot-Protection Circuitry Power-Up High-Impedance State Buffered Control Inputs Reduce dc Loading Effects Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPsdescription
These 9-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers, parity bus interfacing, and working registers. With the clock-enable (CLKEN) input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock (CLK) input. Taking CLKEN high disables the clock buffer, latching the outputs. The ALS29823 have noninverting data (D) inputs. Taking the clear (CLR) input low causes the nine Q outputs to go low independently of the clock. A buffered output-enable (OE) input places the nine outputs in either a normal logic state (high or low logic levels) or a high-impedance state. The outputs also are in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54ALS29823 is characterized for operation over the full military temperature range to 125°C. The SN74ALS29823 is characterized for operation from to 70°C.FUNCTION TABLE (each flip-flop) INPUTS OE CLR CLKEN CLK OUTPUT Q0 Z
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC. 7 V Input voltage, VI. 5.5 V Voltage applied to a disabled high-impedance output. 5.5 V Operating free-air temperature range, TA: to 125°C Storage temperature range. to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
SN54ALS29823 MIN VCC VIH VIL IOH IOL tw Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Pulse duration CLR low CLK high or low CLR inactive tsu Setup time before CLK Data CLKEN high or low th TA Hold time after CLK Operating free-air temperature CLKEN Data °C ns NOM 5 MAX 5.5 UNIT mA ns
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOH VOL IOZH IOZL II IIH IIL IOS§ ICC TEST CONDITIONS VCC 4.5 V, VCC 4.5 5V VCC 4.5 V, VCC 5.5 V, VCC 5.5 V, VCC 5.5 V, VCC 5.5 V, VCC 5.5 V, VCC 5.5 V, VCC 18 mA IOH 12 mA IOH 18 mA IOL = 0 Outputs high Outputs low Outputs open All typical values are at VCC 25°C. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. 75 SN54ALS29823 MIN TYP MAX mA 3.3 UNIT µA mA
|Related products with the same datasheet|
|Some Part number from the same manufacture Texas Instruments, Inc.|
|SN74ALS29823DWR ti SN74ALS29823, 9-Bit Bus Interface Flip-flops With 3-State Outputs|
|SN74ALS29825 8-bit Bus Interface Flip-flop With 3-state Output|
|SN74ALS29825DW ti SN74ALS29825, 8-Bit Bus Interface Flip-flops With 3-State Outputs|
|SN74ALS29826 8-bit Bus Interface Flip-flop With 3-state Output|
|SN74ALS29827 10-bit Buffer And Bus Driver With 3-state Outputs|
|SN74ALS29827DW ti SN74ALS29827, 10-Bit Buffers/drivers With 3-State Outputs|
|SN74ALS29828 10-bit Buffer And Bus Driver With 3-state Outputs|
|SN74ALS29828DW ti SN74ALS29828, 10-Bit Buffers/drivers With 3-State Outputs|
|SN74ALS29833 8-bit to 9-bit Parity Bus Transceiver|
|SN74ALS29833DW ti SN74ALS29833, 8-Bit to 9-Bit Parity Transceivers|
|SN74ALS29841 10-bit Bus-interface D-type Latch With 3-state Outputs|
|SN74ALS29841DW ti SN74ALS29841, 10-Bit Bus Interface D-type Latches With 3-State Outputs|
|SN74ALS29843 9-bit Bus Interface D-type Latches With 3-state Outputs|
|SN74ALS29845 8-bit Bus Interface D-type Latches With 3-state Outputs|
|SN74ALS29854 8-bit to 9-bit Parity Bus Transceiver|
|SN74ALS29854DW ti SN74ALS29854, 8-Bit to 9-Bit Parity Bus Transceivers|
|SN74ALS29861 10-bit Bus Transceiver With 3-state Output|
|SN74ALS29861DW ti SN74ALS29861, 10-Bit Bus Transceivers|
|SN74ALS29862 10-bit Bus Transceiver With 3-state Output|
|SN74ALS29863 9-bit Transceiver With 3-state Outputs|
|SN74ALS29863DW ti SN74ALS29863, 9-Bit Bus Transceivers With 3-State Outputs|
54AC520 : Military/Aerospace->FACT AC. 54AC520 - 8-Bit Identity Comparator, Package: Lcc, Pin Nb=20.
74LCXZ2245 : CMOS/BiCMOS->LVT/ALVT/LCX/LPT Family->Low Voltage. Low Voltage Bidriectional Transceiver With 5V Tolerant Inputs And Outputs And 26 Ohm Series Resistors in B Outputs.
74LVC1G18GV : 74LVC1G18; 1-of-2 Non-inverting Demultiplexer With 3-state Deselected Output;; Package: SOT457 (TSOP6, SMT6, SSOT6).
BU4S81 : . The is an ultra-compact IC with one dual-input positive logic AND gate BU4081B circuit built into an SMP. 1) Low current dissipation. 2) Super-mini mold package designed for surface mounting. 3) Wide range of operating power supply voltages. 4) Direct drive of 2 L-TTL inputs and 1 LS-TTL input. Parameter Power supply voltage Power dissipation Input.
DM74AS1804 : Bipolar->AS Family. Hex 2-Input NAND Driver. These devices contain six independent 2-Input drivers each of which performs the logic NAND function. The DM74AS1804 is equivalent to the DM74AS804B but the supply voltage and ground pins are centered in the package. This positioning of the supply voltage and ground pins reduce the lead inductance of these pins. This reduction of lead inductance will.
HEF4007UB : HEF4007UB; Dual Complementary PaIR And Inverter;; Package: SOT108-1 (SO14), SOT27-1 (DIP14).
KIC7SU04FU : = Inverter Gate (Unbuffer) ;; Package = Usv.
MC74VHC1GT05DFT1 : Noninverting Buffer/cmos Logic Level Shifter.
MT90812 : 64 X 64 Channels Multi-featured Integrated Digital Switch (IDX) With Conferencing, DTMF And FSK Tone Generation For Soho And PBX .
SN54HC02 : . Wide Operating Voltage Range 6 V Outputs Can Drive To 10 LSTTL Loads Low Power Consumption, 20-µA Max ICC The 'HC02 devices contain four independent 2-input NOR gates. They perform the Boolean function B in positive logic. ORDERING INFORMATION TA PDIP N SOIC to 85°C SOP NS SSOP DB TSSOP PW CDIP to 125°C CFP W PACKAGE Tube Tape and reel Tape.
SN74ABT125D : Non-Inverting Buffers and Drivers. ti SN74ABT125, Quadruple Bus Buffer Gates With 3-State Outputs.
TC74HC173 : CMOS/BiCMOS->HC/HCT Family. Quad D-type Register.
TC74HC86AF : Quad Exclusive OR GATE.
74HC4015NB : HC/UH SERIES, 4-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16. s: Register Type: Serial In / Parallel Out ; Shift Direction: Right ; Supply Voltage: 5V ; Package Type: DIP, Other, PLASTIC, DIP-16 ; Logic Family: CMOS ; Pin Count: 16 ; Number of units in IC: 2 ; Number of Bits (Stages): 4 ; Clock Frequency: 20 MHz ; Propagation.