Details, datasheet, quote on part number: SN74ALS29854NT3
PartSN74ALS29854NT3
CategorySemiconductors => Logic => Buffer/Driver/Transceiver => Parity Transceiver
Part familySN74ALS29854 8-Bit To 9-Bit Parity Bus Transceivers
TitleParity Transceivers
Description8-Bit To 9-Bit Parity Bus Transceivers 24-PDIP 0 to 70
CompanyTexas Instruments, Inc.
StatusOBSOLETE
ROHSNot Compliant
SampleNo
DatasheetDownload SN74ALS29854NT3 datasheet
Quote
Find where to buy
 
  
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
24NTPDIPR-PDIP-T 6.7331.644.572.54
Application notes
• Advanced Schottky (ALS and AS) Logic Families
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using | Doc

 

Features, Applications

Functionally Similar to AMD's AM29854 High-Speed Bus Transceiver With Parity Generator/Checker Parity-Error Flag With Open-Collector Outputs Latch for Storing the Parity-Error Flag Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

description

The to 9-bit parity 11 14 transceiver designed for two-way communication 12 13 between data buses. When data is transmitted from the A bus to the B bus, a parity bit is generated. When data is transmitted from the B bus to the A bus with its corresponding parity bit, the parity-error (ERR) output indicates whether or not an error in the B data has occurred. The output-enable (OEA, OEB) inputs can be used to disable the device so that the buses are effectively isolated. A 9-bit parity generator / checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports with an open-collector ERR flag. ERR can be either passed, sampled, stored, or cleared from the latch using the latch-enable (LE) and clear (CLR) control inputs. When both OEA and OEB are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability. The SN74ALS29854 is characterized for operation from to 70°C.

FUNCTION TABLE INPUTS OEB OEA CLR of Hs Odd Even NA Odd H Even Odd Even Ls NA Odd Even B X OUTPUT AND I/O A NA PARITY L NA ERR H NA OPERATION

A data to B bus and generate parity B data to A bus and check parity Store error flag Clear error-flag register Isolation§

NA = not applicable, = no change, X = don't care Summation of high-level inputs includes PARITY along with Bi inputs. Output states shown assume ERR was previously high. § In this mode, ERR, when enabled, shows inverted parity of the A bus.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

ERROR-FLAG FUNCTIONS INPUTS LE L CLR L INTERNAL TO DEVICE POINT OUTPUT PRESTATE ERRn­1 OUTPUT ERR Pass FUNCTION

ERRn­1 represents the state of ERR before any changes at CLR, LE, or point P.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, VCC. 7 V Input voltage, VI. 7 V Voltage applied to a disabled I/O port. 5.5 V Operating free-air temperature range, TA. to 70°C Storage temperature range. to 150°C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.


 

Related products with the same datasheet
SN74ALS29854DWR
SN74ALS29854NT
SN74ALS29854DWE4
SN74ALS29854DWG4
SN74ALS29854DWRE4
SN74ALS29854DWRG4
SN74ALS29854NTE4
Some Part number from the same manufacture Texas Instruments, Inc.
SN74ALS29861 10-bit Bus Transceiver With 3-state Output
SN74ALS29861DW ti SN74ALS29861, 10-Bit Bus Transceivers
SN74ALS29862 10-bit Bus Transceiver With 3-state Output
SN74ALS29863 9-bit Transceiver With 3-state Outputs
SN74ALS29863DW ti SN74ALS29863, 9-Bit Bus Transceivers With 3-State Outputs
SN74ALS299 8-bit Universal Shift/storage Register With 3-state Outputs
SN74ALS299DW ti SN74ALS299, 8-Bit Universal Shift/storage Registers With 3-State Outputs
SN74ALS30A 8-input Positive-nand Gate
SN74ALS30AD ti SN74ALS30A, 8-input Positive-nand Gates
SN74ALS32 Quad 2-input OR GATE
SN74ALS323 8-bit Universal Shift/storage Register With 3-state Outputs
SN74ALS323DW ti SN74ALS323, 8-Bit Universal Shift/storage Registers With Synchronous Clear And 3-State Outputs
SN74ALS32D ti SN74ALS32, Quad 2-input Positive-OR GATEs
SN74ALS33A Quadruple 2-input Positive-nor Buffers With Open-collector Outputs
SN74ALS33AD ti SN74ALS33A, Quad 2-input Positive-nor Buffers With Open Collector Outputs
SN74ALS34 Hex Noninverter
SN74ALS34D ti SN74ALS34, Hex Noninverting Drivers
SN74ALS352 Dual 4-to-1 Data Selector/multiplexer
SN74ALS352D ti SN74ALS352, Dual 4-Line to 1-Line Data Selectors/multiplexers
SN74ALS35A Hex Noninverter With Open Collector Outputs
SN74ALS35AD ti SN74ALS35A, Hex Noninverters With Open-collector Outputs
 
0-C     D-L     M-R     S-Z