Details, datasheet, quote on part number: SN74ALS323N
PartSN74ALS323N
CategorySemiconductors => Logic => Flip-Flop/Latch/Register => Shift Register
Part familySN74ALS323 8-Bit Universal Shift/Storage Registers With Synchronous Clear And 3-State Outputs
Description8-Bit Universal Shift/Storage Registers With Synchronous Clear And 3-State Outputs 20-PDIP 0 to 70
CompanyTexas Instruments, Inc.
StatusACTIVE
ROHSY
SampleNo
DatasheetDownload SN74ALS323N datasheet
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Specifications 
Operating Temperature Range(C)0 to 70
3-State OutputYes
Technology FamilyALS
tpd @ Nom Voltage(Max)(ns)19
RatingCatalog
Schmitt TriggerNo
Package GroupPDIP
Output Drive (IOL/IOH)(Max)(mA)24/-2.6
Voltage(Nom)(V)5
Approx. Price (US$)4.77 | 1ku
VCC(Max)(V)5.5
F @ Nom Voltage(Max)(Mhz)75
VCC(Min)(V)4.5
ICC @ Nom Voltage(Max)(mA)40
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
20NPDIPR-PDIP-T20TUBESN74ALS323N 6.3524.334.572.54
Application notes
• Advanced Schottky (ALS and AS) Logic Families
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using | Doc

 

Features, Applications
SN74ALS323 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS

Multiplexed I/O Ports Provide Improved Bit Density Four Modes of Operation: Hold (Store) Shift Right Shift Left Load Data Operate With Outputs Enabled or at High Impedance 3-State Outputs Drive Bus Lines Directly Can Be Cascaded for n-Bit Word Lengths Synchronous Clear Applications: Stacked or Push-Down Registers Buffer Storage Accumulator Registers Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

description

These 8-bit universal shift /storage registers feature multiplexed input/output (I/O) ports to achieve full 8-bit data handling a 20-pin package. Two function-select (S0, S1) inputs and two output-enable (OE1, OE2) inputs can be used to choose the modes of operation listed in the function table.

Synchronous parallel loading is accomplished by taking both S0 and S1 high. This places the 3-state outputs in the high-impedance state and permits data applied on the I/O ports to be clocked into the register. Reading out of the register can be accomplished while the outputs are enabled in any mode. Clearing occurs synchronously when the clear (CLR) input is low. Taking either or OE2 high disables the outputs but has no effect on clearing, shifting, or storing data. The SN54ALS323 is characterized for operation over the full military temperature range to 125C. The SN74ALS323 is characterized for operation from to 70C.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

SN74ALS323 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS

FUNCTION TABLE INPUTS MODE CLR OE1 OE2 CLK SL SR A/QA H L QBn a B/QB X QB0 QAn QCn b C/QC X QC0 QBn QDn c I/O PORTS D/QD X QD0 QCn QEn d E/QE X QE0 QDn QFn e F/QF X QF0 QEn QGn f G/QG X QG0 QFn QHn g H/QH X QH0 QGn L h OUTPUTS H L QBn QH0 QGn L h

Hold Shift Right Shift Left Load

NOTE: h = the level of the steady-state input at inputs A through H, respectively. This data is loaded into the flip-flops while the flip-flop outputs are isolated from the I/O terminals. When one or both output-enable inputs are high, the eight I/O terminals are disabled to the high-impedance state; however, sequential operation or clearing of the register is not affected.

C/QC D/QD E/QE F/QF G/QG H/QH SL
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
SN74ALS323 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS
18 11 Six Identical Channels Not Shown H SL (shift left serial input)
I/O ports not shown: B/QB (13), C/QC (6), D/QD (14), E/QE (5), F/QF (15), and G/QG (4).
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, VCC. 7 V Input voltage, VI: All inputs. 7 V I/O ports. 5.5 V Operating free-air temperature range, TA: to 70C Storage temperature range. to 150C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.


 

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