Details, datasheet, quote on part number: TLC2578IDW
PartTLC2578IDW
CategorySemiconductors => Data Converters => Analog to Digital Converter => Precision ADC (<=10MSPS)
Part familyTLC2578 Serial Out, Low Power with Built-In Conversion Clock & 8x FIFO, 8 Channels
DescriptionSerial Out, Low Power with Built-In Conversion Clock & 8x FIFO, 8 Channels 24-SOIC -40 to 85
CompanyTexas Instruments, Inc.
StatusACTIVE
ROHSCompliant
SampleYes
DatasheetDownload TLC2578IDW datasheet
Quote
Find where to buy
 
Specifications 
Digital Supply(Min)(V)2.7
Package GroupSOIC,TSSOP
Power Consumption(Typ)(mW)29
INL(Max)(+/-LSB)1
Operating Temperature Range(C)-40 to 85
SNR(dB)72
RatingCatalog
Resolution(Bits)12
Input Range(Min)(V)-10
Multi-Channel ConfigurationMultiplexed
Analog Voltage AVDD(Max)(V)5.5
SINAD(dB)72
Sample Rate (max)(SPS)200kSPS
Digital Supply(Max)(V)5.5
# Input Channels8
Reference ModeExt
InterfaceSerial SPI
THD(Typ)(dB)-82
Input TypePseudo-Differential,Single-Ended
Approx. Price (US$)7.61 | 1ku
Analog Voltage AVDD(Min)(V)4.75
Input Range(Max)(V)10
Integrated FeaturesOscillator
ArchitectureSAR
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
24DWSOICR-PDSO-G25TUBETLC2578I 7.515.42.351.27
Application notes
• Determining Minimum Acquisition Times for SAR ADCs, part 2
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied | Doc

 

Features, Applications

TLC2578 5-V ANALOG, 3-/5-V DIGITAL, 200-KSPS, 4-/8-CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH ±10-V INPUTS

14-Bit Resolution for TLC3574/78, 12-Bit for TLC2574/2578 Maximum Throughput 200-KSPS Multiple Analog Inputs: ­ 8 Single-Ended Channels for ­ 4 Single-Ended Channels for TLC3574/2574 Analog Input Range: ±10 V Pseudodifferential Analog Inputs SPI/DSP-Compatible Serial Interfaces With SCLK to 25-MHz Built-In Conversion Clock and 8x FIFO Single 5-V Analog Supply; 3-/5-V Digital Supply Low-Power mA in Normal Operation µA in Power Down Programmable Autochannel Sweep and Repeat Hardware-Controlled, Programmable Sampling Period Hardware Default Configuration INL: TLC3574/78: ±1 LSB; TLC2574/78: ±0.5 LSB DNL: TLC3574/78: ±0.5 LSB; TLC2574/78: ±0.5 LSB SINAD: TLC3574/78: 79 dB; 72 dB THD: TLC3574/78: ­82 dB; ­82 dB

CSTART AVDD AGND COMP REFM REFP AGND AVDD A5 A4
CSTART AVDD AGND COMP REFM REFP AGND AVDD A3 A2
description

The TLC3578, TLC2574, and TLC2578 are a family of high-performance, low-power, CMOS analog-to-digital converters (ADC). a 14-bit ADC; a 12-bit ADC. All parts operate from single 5-V analog power supply and to 5-V digital supply. The serial interface consists of four digital input [chip select (CS), frame sync (FS), serial input-output clock (SCLK), serial data input (SDI)], and a 3-state serial data output (SDO). CS (works as SS, slave select), SDI, SDO and SCLK form an SPI interface. FS, SDI, SDO, and SCLK form DSP interface. The frame sync signal (FS) indicates the start of a serial data frame being transferred. When multiple converters connect to one serial port of a DSP, CS works as the chip select to allow the host DSP to access the individual converter. CS can be tied to ground if only one converter is used. FS must be tied to DVDD it is not used (such in an SPI interface). When SDI is tied to DVDD, the device is set in hardware default mode after power on and no software configuration is required. In the simplest case, only three wires (SDO, SCLK, and CS or FS) are needed to interface with the host.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

TLC2578 5-V ANALOG, 3-/5-V DIGITAL, 200-KSPS, 4-/8-CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH ±10-V INPUTS

In addition to being a high-speed ADC with versatile control capability, these devices have an on-chip analog multiplexer (MUX) that can select any analog input or one of three self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK (normal sampling) or can be controlled by a special pin, CSTART, to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short sampling (12 SCLKs) or long sampling (44 SCLKs) to accommodate the faster SCLK operation popular among high-performance signal processors. The TLC3574/78 and TLC2574/78 are designed to operate with low-power consumption. The power saving feature is further enhanced with autopower-down mode and programmable conversion speeds. The conversion clock (internal OSC) is built in. The converter can also use an external SCLK as the conversion clock for maximum flexibility. The TLC3574/78 and TLC2574/78 are specified with bipolar input and a full scale range ±10 V.

AVAILABLE OPTIONS PACKAGED DEVICES 85°C 20-TSSOP (PW) TLC3574IPW 20-SOIC (DW) TLC3574IDW 20-PDIP (N) TLC3574IN 24-SOIC (DW) TLC3578IDW 24-TSSOP (PW) TLC2578IPW TLC3578IPW

DGND AGND TLC3574, TLC2574 NOTE: 4-Bit counter counts the CLOCK, SCLK. The CLOCK is gated by CS falling edge if CS initiates the conversion operation cycle, or gated in by the rising edge if FS initiates the operation cycle. SCLK is disabled for serial interface when CS is high.

TLC2578 5-V ANALOG, 3-/5-V DIGITAL, 200-KSPS, 4-/8-CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH ±10-V INPUTS

REFP Bipolar Signal Scaling MUX 9.9 k Ain 1.5 k Ron C(sample)= 30 pF Equivalent Digital Input Circuit Digital Input VDD

REFM Diode Turn on Voltage: 35 V Equivalent Analog Input Circuit

TERMINAL NO. NAME TLC2578 I Analog signal inputs. Analog input signals applied to these terminals are internally multiplexed. The driving source impedance should be less than or equal to 25 for normal sampling. For larger source impedance, use the external hardware conversion start signal CSTART (the low time of CSTART controls the sampling period) or reduce the frequency of SCLK to increase the sampling time. I/O DESCRIPTION

Analog ground return for the internal circuitry. Unless otherwise noted, all analog voltage measurements are with respect to AGND. Analog supply voltage Internal compensation pin. Install compensation capacitors 0.1 µF between this pin and AGND. Chip select. When CS is high, SDO is in high-impedance state, SDI is ignored, and SCLK is disabled to clock data, but works as conversion clock source if programmed. The falling edge of CS input resets the internal 4-bit counter, enables SDI and SCLK, and removes SDO from high-impedance state. FS is high at CS falling edge, CS falling edge initiates the operation cycle. CS works as slave select (SS) to provide an SPI interface. FS is low at CS falling edge, FS rising edge initiates the operation cycle. CS can be used as chip select to allow host to access the individual converter.

External sampling trigger signal, which initiates the sampling from a selected analog input channel when the device works in extended sampling mode (asynchronous sampling). A high-to-low transition starts the sampling of the analog input signal. A low-to-high transition puts the S/H in hold mode and starts the conversion. The low time of the CSTART signal controls the sampling period. CSTART signal must stay low long enough for proper sampling. CSTART must stay high long enough after the low-to-high transition for the conversion to finish maturely. The activation of CSTART is independent of SCLK and the level of CS and FS. However, the first CSTART cannot be issued before the rising edge of the eleventh SCLK. Tie this pin to DVDD if not used. Digital ground return for the internal circuitry Digital supply voltage


 

Related products with the same datasheet
TLC2578IDWR
TLC2578IPW
TLC2578IPWR
TLC2578IPWRG4
Some Part number from the same manufacture Texas Instruments, Inc.
TLC2578IDWR ti TLC2578, Serial Out, Low Power With Built-in Conversion Clock & 8x Fifo, 8 Channels
TLC25L2
TLC25L2A
TLC25L2ACD ti TLC25L2A, LinCMOS(TM) Dual Operational Amplifier
TLC25L2B
TLC25L2BCD ti TLC25L2B, LinCMOS(TM) Dual Operational Amplifier
TLC25L2C
TLC25L2CD ti TLC25L2, Dual Upower Low-voltage Operational Amplifier
TLC25L2Y
TLC25L4
TLC25L4A
TLC25L4ACD ti TLC25L4A, LinCMOS(TM) Quad Operational Amplifier
TLC25L4B
TLC25L4BCD ti TLC25L4B, LinCMOS(TM) Quad Operational Amplifier
TLC25L4C
TLC25L4CD ti TLC25L4, Quad Upower Low-voltage Operational Amplifier
TLC25L4Y
TLC25LX
TLC25LXA
TLC25LXB
TLC25M2
Same catergory

AD7712 : CMOS, 24-Bit Sigma-Delta, Signal Conditioning ADC With 2 Analog Input Channels..

BWS1215 : BWS DC/DC Converters ( 2.5 Watt ). BWS DC/DC converters offer excellent regulation and isolation in an industry-standard DIP package. The BWS is ideal for industrial, telecom, and networking applications, and short circuit protection, low profile, and 500 VDC isolation. Please see the BWD series for dual output applications. TECHNICAL S Input Voltage Range 5 VDC Nominal 12 VDC Nominal.

CA3306 : 6-Bit, 15 Msps, Flash A/D Converters. UCT BS O ter at BSTIT LE SU Support Cen /tsc al om FOR A our Technic ww.intersil.c on SIL o INTER 1-888® CMOS Low Power with Video Speed (Typ). 70mW Parallel Conversion Technique Signal Power Supply Voltage. 7.5V 15MHz Sampling Rate with Single 5V Supply 6-Bit Latched Three-State Output with Overflow Bit Pin-for-Pin Retrofit for the CA3300 The CA3306.

DAC7613E : ti DAC7613, 12-Bit, Voltage Output Digital-to-analog Converter. For most current data sheet and other product information, visit www.burr-brown.com q LOW POWER: 1.8mW q UNIPOLAR OR BIPOLAR OPERATION q SETTLING TIME: q 12-BIT LINEARITY AND MONOTONICITY: +85°C q DATA READBACK q DOUBLE-BUFFERED DATA INPUTS q 24-LEAD SSOP PACKAGE The a 12-bit, voltage output digital-toanalog converter with guaranteed 12-bit monotonic.

LTC1742 : ->Single Input. LTC1742, 5V, 65Msps Low Noise ADC Parallel Interface.

MAX1495CCJ : 3.5- And 4.5-digit, Single-chip ADCs With LCD Drivers. o High Resolution MAX1495: 4.5 Digits (±19,999 Count) MAX1493: 4.5 Digits (±19,999 Count) MAX1491: 3.5 Digits (±1999 Count) o Sigma-Delta ADC Architecture No Integrating Capacitors Required No Autozeroing Capacitors Required >100dB of Simultaneous 50Hz and 60Hz Rejection o Operate from a Single or 5.25V Supply o Selectable Input Range ±2V o Selectable.

MAX5821 : Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-output DAC. The is a dual, 10-bit voltage-output, digital-toanalog converter (DAC) with C TM -compatible, 2-wire interface that operates at clock rates to 400kHz. The device operates from a single to 5.5V supply 3.6V. A power-down mode decreases current consumption to less than 1µA. The MAX5821 three software-selectable powerdown output impedances: 1k , and high.

MX390 : Quad, 12-bit, P-compatible DAC.

TC7136 : Display A/D Converters. The TC7136 And TC7136A Are Low-power,3-1/2 Digit With Liquid Crystal Display (LCD)drivers With Analog-to-digital Converters.

TDA8762A : TDA8762A; 10-bit High-speed Low-power Analog-to-digital Converter. Product Supersedes data of 1995 April 27 File under Integrated Circuits, IC02 1996 Mar 21 10-bit resolution Sampling rate to 80 MHz DC sampling allowed One clock cycle conversion only High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 4.43 MHz full-scale input at fclk = 80 MHz) No missing codes guaranteed In range.

TDF8704T : . Product Supersedes data of April 1993 File under Integrated Circuits, IC02 June 1994 8-bit resolution Sampling rate to 50 MHz Extended temperature range to +85 °C) High signal-to-noise ratio over a large analog input frequency range (7.4 effective bits at 4.43 MHz full-scale input and at fclk = 50 MHz) Binary 3-state TTL outputs Overflow/underflow 3-state.

TLC540IDW : ti TLC540, 8-Bit, 75 KSPS ADC Serial-Out, On-chip 12-Ch. Analog Mux, 11 Ch..

TLC5628C : Octal 8-bit Digital-to-analog Converters. Eight 8-Bit Voltage Output DACs 5-V Single-Supply Operation Serial Interface High-Impedance Reference Inputs Programmable or 2 Times Output Range Simultaneous Update Facility Internal Power-On Reset Low-Power Consumption Half-Buffered Output DACC DACD REF1 LDAC LOAD REF2 DACH DACG applications Programmable Voltage Sources Digitally Controlled Amplifiers/Attenuators.

TLV5628 : Octal 8-bit DAC, 3v. Eight 8-Bit Voltage Output DACs 3-V Single Supply Operation Serial Interface High-Impedance Reference Inputs Programmable for or 2 Times Output Range Simultaneous Update Facility Internal Power-On Reset Low Power Consumption Half-Buffered Output DACC DACD REF1 LDAC LOAD REF2 DACH DACG applications Programmable Voltage Sources Digitally Controlled Amplifiers/Attenuators.

TS8388B : Broadband Data Conversion. ADC 8-bit 1 GSPS. 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth (-3 dB) 1 GSPS (min) Sampling Rate SINAD dB (7.2 Effective Bits), SFDR = 58 dBc, = 1 GSPS, FIN = 20 MHz SINAD dB (7.0 Effective Bits), SFDR = 52 dBc, = 1 GSPS, FIN = 500 MHz SINAD dB (6.8 Effective Bits), SFDR = 50 dBc, = 1 GSPS, FIN = 1000 MHz (-3 dB FS) 2-tone IMD: -52 dBc (489 MHz,.

MAX1032 : The MAX1032/MAX1033 multirange, low-power, 14-bit, successive-approximation, analog-to-digital converters (ADCs) operate from a single +5V supply and achieve throughput rates up to 115ksps. A separate digital supply allows digital interfacing with 2.7V to 5.25V systems using the SPI™-/QSPI™-/MICROWIRE™-compatible serial interface. Partial power-down.

ADS1014 : 12-Bit ADC With Integrated PGA, Comparator, Oscillator, And Reference The ADS1013, ADS1014, and ADS1015 are precision analog-to-digital converters (ADCs) with 12 bits of resolution offered in an ultra-small, leadless QFN-10 package or an MSOP-10 package. The ADS1013/4/5 are designed with precision, power, and ease of implementation in mind. The ADS1013/4/5.

 
0-C     D-L     M-R     S-Z