Details, datasheet, quote on part number: TMS28F400AET
PartTMS28F400AET
CategoryMemory => Flash
Descriptionti TMS28F400AET, 262 144 BY 16-Bit, 524 288 BY 8-Bit Auto-select Boot--bit Auto-select Boot-block Flash Memory
CompanyTexas Instruments, Inc.
DatasheetDownload TMS28F400AET datasheet
  

 

Features, Applications

By 8 Bits By 16 Bits Array-Blocking Architecture ­ One 16K-Byte Protected Boot Block ­ Two 8K-Byte Parameter Blocks ­ One 96K-Byte Main Block ­ Three 128K-Byte Main Blocks ­ Top or Bottom Boot Locations '28F400Axy Offers a User-Defined 8-Bit (Byte) or 16-Bit (Word) Organization '28F004Axy Offers Only the 8-Bit Organization Maximum Access / Minimum Cycle Time ­ Commercial and Extended 5-V VCC 10% 3.3-V VCC ns ­ Automotive (offered for only 5-V VCC voltage configurations) 5-V VCC or Z Depending on VCC / VPP Configuration) or B for Top or Bottom Boot-Block Configuration) 100 000 and 10 000 Program / Erase Cycle Versions Three Temperature Ranges ­ Commercial. 70°C ­ Extended. 85°C ­ Automotive. to 125°C Industry Standard Packages Offered ­ 40-Pin TSOP (DCD Suffix) ­ 44-Pin PSOP (DBJ Suffix) ­ 48-Pin TSOP (DCD Suffix) Low Power Dissipation ( VCC ) ­ Active Write. mW ( Byte Write) ­ Active Read. mW ( Byte Read) ­ Active Write. mW ( Word Write) ­ Active Read. mW ( Word Read) ­ Block Erase. mW ­ Standby. 0.72 mW (CMOS-Input Levels)

PIN NOMENCLATURE ­ A17 BYTE NC RP VCC VPP VSS W DU/WP Address Inputs Byte Enable Data In / Out Data In / Out (word-wide mode), Low-Order Address (byte-wide mode) Chip Enable Output Enable No Internal Connection Reset / Deep Power-Down Power Supply Power Supply for Program / Erase Ground Write Enable Do Not Use for 'AMy or 'AZy /Write Protect

Fully Automated On-Chip Erase and Word / Byte Program Operations Write Protection for Boot Block Industry Standard Command-State Machine (CSM) ­ Erase Suspend/Resume ­ Algorithm-Selection Identifier Three Different Combinations of Supply Voltages Offered All Inputs / Outputs TTL Compatible

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Table of Contents description. 3 read operations. device symbol nomenclature. 5 programming operations. functional block diagram. 6 erase operations. architecture. 6 automatic power-saving mode. block memory maps. 6 reset / deep power-down mode. boot-block data protection. 8 power-supply detection. parameter block. 8 absolute maximum ratings. main block. 8 capacitance. data protection. 8 TMS28F004ASy and TMS28F400ASy. command-state machine (CSM). 8 TMS28F004AEy and TMS28F400AEy. operation. 9 TMS28F004AMy and TMS28F400AMy. command definitions. 9 TMS28F004AFy and TMS28F400AFy. status register. 10 TMS28F004AZy and TMS28F400AZy. byte-wide or word-wide mode selection. 11 Parameter Measurement Information. command-state machine (CSM) operations. 13 mechanical data ­ DBJ (R-PDSO-G44). clear status register. 13 mechanical data ­ DCD (R-PDSO-G**).

description

The by 8 bits by 16 bits 194 304-bit), boot-block flash memory that can be electrically block-erased and reprogrammed. The TMS28F400Axy is organized in a blocked architecture consisting of:

One 16K-byte protected boot block Two 8K-byte parameter blocks One 96K-byte main block Three 128K-byte main blocks

Table 1 lists the five different voltage configurations available for ordering. Operation 256K-word (16-bit) organization is user-definable. Table 1. VCC/VPP Voltage Configurations, Temperature, and Speeds Matrix

DEVICE CONFIGURATION DEVICE TMS28F400AEy TMS28F400AMy READ (VCC) 5 V±10% PROGRAM/ERASE (VPP) 12 V±10% TEMPERATURE (TA) to 125°C Only the 44-pin PSOP is offered in the to 125°C temperature range. NOTE 1: All configurations are available in the TMS28F004Axy (8 bit configuration only) and top or bottom boot. ACCESS SPEEDS ­ 5-V(3.3-V) VCC 90 ns


 

Some Part number from the same manufacture Texas Instruments, Inc.
TMS28F400AFB ti TMS28F400AFB, 262 144 BY 16-Bit, 524 288 BY 8-Bit Auto-select Boot-block Flash Memory
TMS28F400AFT ti TMS28F400AFT, 262 144 BY 16-Bit, 524 288 BY 8-Bit Auto-select Boot-block Flash Memory
TMS28F400AMB ti TMS28F400AMB, 262 144 BY 16-Bit, 524 288 BY 8-Bit Auto-select Boot-block Flash Memory
TMS28F400AMT ti TMS28F400AMT, 262 144 BY 16-Bit, 524 288 BY 8-Bit Auto-select Boot-block Flash Memory
TMS28F400ASB ti TMS28F400ASB, 262 144 BY 16-Bit, 524 288 BY 8-Bit Auto-select Boot-block Flash Memory
TMS28F400AST ti TMS28F400AST, 262 144 BY 16-Bit, 524 288 BY 8-Bit Auto-select Boot-block Flash Memory
TMS28F400AXY 524 288 BY 8-bit/262 144 BY 16-bit Auto-select Boot-block Flash Memories
TMS28F400AZB ti TMS28F400AZB, 262 144 BY 16-Bit, 524 288 BY 8-Bit Auto-select Boot-block Flash Memory
TMS28F400AZT ti TMS28F400AZT, 262 144 BY 16-Bit, 524 288 BY 8-Bit Auto-select Boot-block Flash Memory
TMS28F400BZ 524 288 BY 8-bit/262 144 BY 16-bit Boot-block Flash Memory
TMS28F400BZB90BDBJL ti TMS28F400BZB, 262 144 BY 16-Bit, 524 288 BY 8-Bit Boot-block Flash Memory
TMS28F512A 65 536 BY 8-bit Flash Memory
TMS28F512A-10C4FML ti TMS28F512A, 65 536 BY 8-Bit Flash Memory
TMS28F512A-12C3 65 536 BY 8-bit Flash Memory
TMS28F512A-12C4FML ti TMS28F512A, 65 536 BY 8-Bit Flash Memory
TMS28F512A-15C3 65 536 BY 8-bit Flash Memory
TMS28F512A-15C4FML ti TMS28F512A, 65 536 BY 8-Bit Flash Memory
TMS28F512A-17C3 65 536 BY 8-bit Flash Memory
TMS28F800ALB10BDCDE ti TMS28F800ALB, 1 048 576 BY 8-Bit, 524 288 BY 16-Bit Autoselect Boot Block Flash Memory
TMS28F800ALT12BDCDE ti TMS28F800ALT, 1 048 576 BY 8-Bit, 524 288 BY 16-Bit Autoselect Boot Block Flash Memory
TMS29F002 262 144 BY 8-bit Flash Memory
Same catergory

HM-6551 : 256 X 4 CMOS RAM. The x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous circuit design techniques are employed to achieve high performance and low power operation. On chip latches are provided for address and data outputs allowing efficient interfacing with microprocessor systems. The data output buffers can be forced to a high impedance.

HM62G18512ABP-30 : Fast SRAM. Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp. The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips.

IC61C3216 : . The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the s and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices. High-speed access time: 12, 15, and 20 ns CMOS low power operation 450 mW (typical) operating 250 µW (typical) standby.

KM416S8030 : 2m X 16bit X 4 Banks Synchronous DRAM. JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs CAS Latency & 3) Burst Length full page) Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock. Burst Read Single-bit Write operation DQM for masking Auto & self refresh.

M366S6453ETU : Unbuffered DIMM. = M366S6453ETU 168Pin Unbuffered Dimm Based on 256Mb E-die (x8, X16) ;; Density(MB) = 512 ;; Organization = 64Mx64 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 4K/64ms ;; Speed = 7A ;; #of Pin = 168 ;; Power = C ;; Component Composition = (32Mx8)x16 ;; Production Status = Mass Production ;; Comments = -.

MCM6706AR : 32k X 8 Bit Static Random Access Memory. The a 262,144 bit static random access memory organized as 32,768 words of 8 bits, fabricated using high performance silicon­gate BiCMOS technology. Static design eliminates the need for external clocks or timing strobes. Output enable (G) is a special control feature that provides increased system flexibility and eliminates bus contention problems.

SN54ABT7819GB : 512 18 2 Clocked Bidirectional First-in, First-out Memory. Member of the Texas Instruments WidebusTM Family Advanced BiCMOS Technology Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Read and Write Operations Synchronized to Independent System Clocks Two Separate × 18 Clocked FIFOs Buffering Data in Opposite Directions IRA and ORA Synchronized to CLKA IRB and ORB Synchronized to CLKB Microprocessor.

TC55V2325FF-7 : Density = 2M ;; Organization = 64Kx32 ;; VDD = 3.3V ;; Speed = 66MHz ;; Comment = Pbsram ;; Status = Eol ;; Additional Information =  .

K7M323625M : 1Mx36-Bit Flow Through NtRAM™ The K7M323625M is 37,748,736-bits Synchronous Static SRAMs. The NtRAM™, or No Turnaround Random Access Memory utilizes all bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input clock. Burst order control must.

LH28F128BFHT-PBTL75A : Flash Memory 16Mbit (8Mbitx16) 128M (x16) Bottom Boot Block, 75ns. Handle this document carefully for it contains material protected by international copyright law. Any reproduction, full or in part, of this material is prohibited without the express written permission of the company. When using the products covered herein, please observe the conditions written herein and the precautions outlined in the following paragraphs.

K4R571669E : The RDRAM® device is a general purpose high-performance memory device suitable for use in a broad range of applications including computer memory, graphics, video and any other application where high bandwidth and low latency are required. The 256Mbit RDRAM devices are extremely high-speed CMOS DRAMs organized as 16M words by 16 bits. The use of Rambus.

CY7C0831AV-167AI : 128K X 18 DUAL-PORT SRAM, 4 ns, PQFP120. s: Memory Category: SRAM Chip ; Density: 2359 kbits ; Number of Words: 128 k ; Bits per Word: 18 bits ; Package Type: TQFP, 14 X 14 MM, 1.40 MM HEIGHT, TQFP-120 ; Pins: 120 ; Logic Family: CMOS ; Supply Voltage: 3.3V ; Access Time: 4 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F).

DS1220Y-IND : 2K X 8 NON-VOLATILE SRAM MODULE, 200 ns, PDIP24. s: Memory Category: NVRAM, NVSRAM, SRAM Chip ; Density: 16 kbits ; Number of Words: 2 k ; Bits per Word: 8 bits ; Package Type: DIP, 0.720 INCH, PLASTIC, DIP-24 ; Pins: 24 ; Logic Family: CMOS ; Supply Voltage: 5V ; Access Time: 200 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F).

25LC080-I/OT : 1K X 8 SPI BUS SERIAL EEPROM, PDSO5. s: Density: 8 kbits ; Number of Words: 1 k ; Bits per Word: 8 bits ; Bus Type: Serial ; Production Status: Full Production ; Data Rate: 2 MHz ; Logic Family: CMOS ; Supply Voltage: 3.3V ; Package Type: SOT-23, 5 PIN ; Pins: 5 ; Operating Range: Industrial ; Operating Temperature: -40 to 85 C (-40 to 185 F).

 
0-C     D-L     M-R     S-Z