Details, datasheet, quote on part number: TMS28F800ALT12BDCDL
CategorySemiconductors => Memory => Flash
Part familyTMS28F800ALT 1 048 576 By 8-Bit, 524 288 By 16-Bit Autoselect Boot Block Flash Memory
Descriptionti TMS28F800ALT, 1 048 576 BY 8-Bit, 524 288 BY 16-Bit Autoselect Boot Block Flash Memory
CompanyTexas Instruments, Inc.
ROHSNot Compliant
DatasheetDownload TMS28F800ALT12BDCDL datasheet
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
48DCD 1218.41


Features, Applications

By 8 Bits By 16 Bits Array-Blocking Architecture Two 8K-Byte/4K-Word Parameter Blocks One 96K-Byte/48K-Word Main Block Seven 128K-Byte/64K-Word Main Blocks One 16K-Byte/8K-Word Protected Boot Block Top or Bottom Boot Locations All Inputs / Outputs TTL-Compatible Maximum Access / Minimum Cycle Time 5-V VCC 3-V VCC 120 ns (See Table 1 for VCC/VPP Voltage Configuration) 100 000- and 10 000-Program/ Erase Cycle Versions Three Temperature Ranges Commercial. 70C Extended. 85C Automotive. to 125C Embedded Program/Erase Algorithms Automated Byte Programming Automated Word Programming Automated Block Erase Erase Suspend/Erase Resume Automatic Power-Saving Mode JEDEC Standards Compatible Compatible With JEDEC Byte/Word Pinouts Compatible With JEDEC EEPROM Command Set Fully Automated On-Chip Erase and Byte / Word Program Operations

Package Options 44-Pin Plastic Small-Outline Package (PSOP) (DBJ Suffix) 40-Pin Thin Small-Outline Package (TSOP) (DCD Suffix) 48-Pin TSOP (DCD Suffix) 48-Ball Micro Ball Grid Array (BGAt) available Low Power Dissipation ( VCC ) Active Write. mW ( Byte Write) Active Read. mW ( Byte Read) Active Write. mW ( Word Write) Active Read. mW ( Word Read) Block Erase. mW Standby. 0.55 mW (CMOS-Input Levels) Deep Power-Down Mode. 0.044 mW Write-Protection for Boot Block Industry Standard Command-State Machine (CSM) Erase Suspend/Resume Algorithm-Selection Identifier Flexible VPP/Supply Voltage Combination

PIN NOMENCLATURE A19 BYTE NC RP VCC VPP VSS WE WP Address Inputs Address Inputs (for 40-pin TSOP only) Byte Enable Data In / Out Data In / Out (word-wide mode), Low-Order Address (byte-wide mode) Chip Enable Output Enable No Internal Connection Reset / Deep Power Down Power Supply Power Supply for Program / Erase Ground Write Enable Write Protect (for 40-pin and 48-pin TSOP only)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. BGA is a trademark of Tessera, Inc.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Table of Contents description. 2 read operations. programming operations. device symbol nomenclature. 5 erase operations. logic symbol for TMS28F008Axy 40-pin package. 6 automatic power-saving mode. logic symbol for TMS28F800Axy 44-pin package. 7 reset / deep power-down mode. logic symbol for TMS28F800Axy 48-pin package. 8 absolute maximum ratings. functional block diagram. 9 recommended operating conditions. architecture. 9 word/byte typical write and block-erase performance. block memory maps. 10 electrical characteristics. boot-block data protection. 12 power-up and reset switching characteristics for parameter block. TMS28F008ASy or 'AEy and main block. TMS28F800ASy or 'AEy. data protection. 13 power-up and reset switching characteristics for command-state machine (CSM). TMS28F008AVy or 'ALy and TMS28F800AVy or 'ALy. operation. 13 power-up and reset switching characteristics for command definition. 14 TMS28F008AZy and TMS28F800AZy. status register. 15 Parameter Measurement Information. byte-wide or word-wide mode selection. 16 mechanical data DBJ (R-PDSO-G44). command-state machine (CSM) operations. 18 mechanical data DCD (R-PDSO-G**). clear status register. 18


The 388 608-bit, boot-block flash memory that can be electrically block-erased and reprogrammed. The TMS28F800Axy is organized in a blocked architecture consisting of:

One 16K-byte/8K-word protected boot block Two 8K-byte/4K-word parameter blocks One 96K-byte/48K-word main block Seven 128K-byte/64K-word main blocks

The device can be ordered in four different voltage configurations (see Table 1). Operation 512K-word (16-bit) organization is user-definable. Embedded program and block-erase functions are fully automated by the on-chip write-state machine (WSM), simplifying these operations and relieving the system microcontroller of these secondary tasks. WSM status can be monitored by an on-chip status register to determine progress of program/erase tasks. The device features user-selectable block erasure. The TMS28F800AEy configuration allows the user to perform memory reads using 2.73.6-V VCC and 5-V VCC for optimum power consumption. Erasing or programming the device can be accomplished with VPP or 12-V. This configuration is offered in the commercial temperature range to 70C) and the extended temperature range to 85C). Also, TMS28F800ASy offers VCC V and VCC 5 V for optimum power consumption. The TMS28F800ALy configuration allows performance of memory reads using VCC V for optimum power consumption. The TMS28F800AVy configuration allows performance of memory reads using VCC 2.73.6 V for optimum power consumption. The TMS28F800AZy configuration offers a 5-V memory read with a 3-V/5-V/12-V program and erase. This configuration is offered in three temperature ranges: to 125C. The TMS28F800Axy is offered a 44-pin plastic small-outline package (PSOP) and a 48-pin thin small-outline package (TSOP) organized or 8-bit. The TMS28F008 is functionally equivalent to the 'F800 except that it is organized only a 8-bit configuration, and it is offered only a 40-pin TSOP.


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