Details, datasheet, quote on part number: TMS320C6713GDP225
PartTMS320C6713GDP225
CategoryDSPs (Digital Signal Processors) => TMS320 Family
TitleTMS320 Family
Descriptionti TMS320C6713, Floating-point Digital Signal Processor
CompanyTexas Instruments, Inc.
DatasheetDownload TMS320C6713GDP225 datasheet
Quote
Find where to buy
 
  

 

Features, Applications

Signal Processor (DSP): TMS320C6713 - Eight 32-Bit Instructions/Cycle - 32/64-Bit Data Word 225-, 200-MHz (GDP), and 200-, 167-MHz (PYP) Clock Rates 5-, 6-Instruction Cycle Times and 1336 /1000 MIPS /MFLOPS - Rich Peripheral Set, Optimized for Audio - Highly Optimized C/C++ Compiler VelociTI Advanced Very Long Instruction Word (VLIW) TMS320C67x DSP Core - Eight Independent Functional Units: - Two ALUs (Fixed-Point) - Four ALUs (Floating- and Fixed-Point) - Two Multipliers (Floating- and Fixed-Point) - Load-Store Architecture With 32 32-Bit General-Purpose Registers - Instruction Packing Reduces Code Size - All Instructions Conditional Instruction Set Features - Native Instructions for IEEE 754 - Single- and Double-Precision - Byte-Addressable 16-, 32-Bit Data) - 8-Bit Overflow Protection - Saturation; Bit-Field Extract, Set, Clear; Bit-Counting; Normalization L1/L2 Memory Architecture 4K-Byte L1P Program Cache (Direct-Mapped) 4K-Byte L1D Data Cache 256K-Byte L2 Memory Total: 64K-Byte L2 Unified Cache/Mapped RAM, and 192K-Byte Additional L2 Mapped RAM Device Configuration - Boot Mode: HPI, 16-, 32-Bit ROM Boot - Endianness: Little Endian, Big Endian 32-Bit External Memory Interface (EMIF) - Glueless Interface to SRAM, EPROM, Flash, SBSRAM, and SDRAM - 512M-Byte Total Addressable External Memory Space Enhanced Direct-Memory-Access (EDMA) Controller (16 Independent Channels)

D 16-Bit Host-Port Interface (HPI) D Two Multichannel Audio Serial Ports

(McASPs) - Two Independent Clock Zones Each (1 TX and 1 RX) - Eight Serial Data Pins Per Port: Individually Assignable to any of the Clock Zones - Each Clock Zone Includes: - Programmable Clock Generator - Programmable Frame Sync Generator - TDM Streams From 2-32 Time Slots - Support for Slot Size: Bits - Data Formatter for Bit Manipulation - Wide Variety of I2S and Similar Bit Stream Formats - Integrated Digital Audio Interface Transmitter (DIT) Supports: - S/PDIF, AES-3, CP-430 Formats to 16 transmit pins - Enhanced Channel Status/User Data - Extensive Error Checking and Recovery

Multi-Master and Slave Interfaces Two Multichannel Buffered Serial Ports: - Serial-Peripheral-Interface (SPI) - High-Speed TDM Interface - AC97 Interface Two 32-Bit General-Purpose Timers Dedicated GPIO Module With 16 pins (External Interrupt Capable) Flexible Phase-Locked-Loop (PLL) Based Clock Generator Module IEEE-1149.1 (JTAG) Boundary-Scan-Compatible Package Options: - 208-Pin PowerPAD Plastic (Low-Profile) Quad Flatpack (PYP) - 272-Ball, Ball Grid Array Package (GDP) 0.13-m/6-Level Copper Metal Process - CMOS Technology 3.3-V I/Os, 1.2-V Internal (PYP) 3.3-V I/Os, 1.26-V Internal (GDP)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. TMS320C67x, VelociTI, and PowerPAD are trademarks of Texas Instruments. I2C Bus is a trademark of Philips Electronics N.V. Corporation All trademarks are the property of their respective owners. IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

GDP 272-Ball BGA package (bottom view). 3 PYP PowerPAD QFP package (top view). 8 description. 9 device characteristics. 10 functional block and CPU (DSP core) diagram. 11 CPU (DSP core) description. 12 memory map summary. 14 peripheral register descriptions. 16 signal groups description. 25 device configurations. 30 configuration examples. 37 debugging considerations. 44 terminal functions. 45 development support. 61 documentation support. 64 CPU CSR register description. 65 interrupts and interrupt selector. 67 external interrupt sources. 69 EDMA module and EDMA selector. 70 PLL and PLL controller. 73 multichannel audio serial port (McASP) peripherals. I2C. 85 general-purpose input/output (GPIO). 86 power-supply sequencing. 87 power-supply decoupling. 87 IEEE 1149.1 JTAG compatibility statement. 88 EMIF device speed. 89 bootmode. 90 absolute maximum ratings over operating case temperature range. 91 recommended operating conditions. 91 electrical characteristics over recommended ranges of supply voltage and operating case temperature. 92 parameter measurement information. 93 signal transition levels. 93 timing parameters and board routing analysis. 94 input and output clocks. 96 asynchronous memory timing. 99 synchronous-burst memory timing. 102 synchronous DRAM timing. 104 HOLD/HOLDA timing. 110 BUSREQ timing. 111 reset timing. 112 external interrupt timing. 114 multichannel audio serial port (McASP) timing. 115 inter-integrated circuits (I2C) timing. 118 host-port interface timing. 120 multichannel buffered serial port timing. 123 timer timing. 134 general-purpose input/output (GPIO) port timing. 135 JTAG test-port timing. 136 mechanical data. 137 revision history. 140









Shading denotes the GDP package pin functions that drop out on the PYP package.

 

Related products with the same datasheet
TMS320C6713GDPA200
TMS320C6713PYP200
Some Part number from the same manufacture Texas Instruments, Inc.
TMS320C6713GDPA200 Floating-point Digital Signal Processor.<<<>>>the TMS320C67x DSPS (including The TMS320C6713 And TMS320C6713B Devices) Compose The Floating-point DSP Generation in The TMS320C6000 DSP Platform. The C6713
TMS320C6713GDPA200 ti TMS320C6713, Floating-point Digital Signal Processor
TMS320C6713PYP200 Floating-point Digital Signal Processor.<<<>>>the TMS320C67x DSPS (including The TMS320C6713 And TMS320C6713B Devices) Compose The Floating-point DSP Generation in The TMS320C6000 DSP Platform. The C6713
TMS320C6713PYP200 ti TMS320C6713, Floating-point Digital Signal Processor
TMS320C80 Digital Signal Processor
TMS320C80GF ti TMS320C80, Multimedia Video Processor
TMS320C82 Digital Signal Processor
TMS320C82GGP50 ti TMS320C82, Multimedia Video Processor
TMS320DM640 Video/imaging Fixed-point Digital Signal Processor<<<>>>high-performance Digital Media Processor (TMS320DM641/TMS320DM640) <<<>>>2.5-, 2-, 1.67-ns Instruction Cycle Time <<<>>>400-, 500-, 600-MHz Clock
TMS320DM640 Video/imaging Fixed-point Digital Signal Processor<<<>>>the TMS320C64x TMS320DM640 Devices) Are The Highest-performance Fixed-point DSP Generation in The TMS320C6000 DSP Platform. The TMS320DM641 And TMS320DM640
TMS320DM640GDK400 Video/imaging Fixed-point Digital Signal Processor<<<>>>high-performance Digital Media Processor (TMS320DM641/TMS320DM640) <<<>>>2.5-, 2-, 1.67-ns Instruction Cycle Time <<<>>>400-, 500-, 600-MHz Clock
TMS320DM640GDK400 Video/imaging Fixed-point Digital Signal Processor<<<>>>the TMS320C64x TMS320DM640 Devices) Are The Highest-performance Fixed-point DSP Generation in The TMS320C6000 DSP Platform. The TMS320DM641 And TMS320DM640
TMS320DM640GNZ400 Video/imaging Fixed-point Digital Signal Processor<<<>>>high-performance Digital Media Processor (TMS320DM641/TMS320DM640) <<<>>>2.5-, 2-, 1.67-ns Instruction Cycle Time <<<>>>400-, 500-, 600-MHz Clock
TMS320DM640GNZ400 Video/imaging Fixed-point Digital Signal Processor<<<>>>the TMS320C64x TMS320DM640 Devices) Are The Highest-performance Fixed-point DSP Generation in The TMS320C6000 DSP Platform. The TMS320DM641 And TMS320DM640
TMS320DM641 Video/imaging Fixed-point Digital Signal Processor <<<>>>High-Performance Digital Media Processor (TMS320DM641/TMS320DM640) <<<>>>2.5-, 2-, 1.67-ns Instruction Cycle Time <<<>>>400-, 500-, 600-MHz Clock
TMS320DM641 Video/imaging Fixed-point Digital Signal Processor<<<>>>the TMS320C64x TMS320DM640 Devices) Are The Highest-performance Fixed-point DSP Generation in The TMS320C6000 DSP Platform. The TMS320DM641 And TMS320DM640
TMS320DM641
TMS320DM641GDK500 Video/imaging Fixed-point Digital Signal Processor <<<>>>High-Performance Digital Media Processor (TMS320DM641/TMS320DM640) <<<>>>2.5-, 2-, 1.67-ns Instruction Cycle Time <<<>>>400-, 500-, 600-MHz Clock
TMS320DM641GDK600 Video/imaging Fixed-point Digital Signal Processor<<<>>>the TMS320C64x TMS320DM640 Devices) Are The Highest-performance Fixed-point DSP Generation in The TMS320C6000 DSP Platform. The TMS320DM641 And TMS320DM640
TMS320DM641GNZ500 Video/imaging Fixed-point Digital Signal Processor <<<>>>High-Performance Digital Media Processor (TMS320DM641/TMS320DM640) <<<>>>2.5-, 2-, 1.67-ns Instruction Cycle Time <<<>>>400-, 500-, 600-MHz Clock
TMS320DM641GNZ500 Video/imaging Fixed-point Digital Signal Processor<<<>>>the TMS320C64x TMS320DM640 Devices) Are The Highest-performance Fixed-point DSP Generation in The TMS320C6000 DSP Platform. The TMS320DM641 And TMS320DM640
Same catergory

ADSP-21060C : 320 Family. High Performance Signal Processor For Communica- Tions,graphics,and Imaging Applications.

ADSP-2109 : Low Cost DSP Microcomputer. SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/ Accumulator, and Shifter Single-Cycle Instruction Execution & Multifunction Instructions On-Chip Program Memory RAM or ROM & Data Memory RAM Integrated.

ADSP-21161N : Low-cost Sharc, 100 Mhz, 600 Mflops, 3.3 V I/O, 1.8 Volt Core, 32/40 Bit Floating Point, 32 Bit Fixed Point.

ADSP-21MOD970 : Multi-port Internet Gateway Processor. PERFORMANCE Complete Single-Chip Multiport Internet Gateway Processor (No External Memory Required) Implements Six Modem Channels in One Package Each Processor Can Implement V.34/V.90 Data/Fax Modem (Includes Datapump and Controller) 312 MIPS Sustained Performance, 19 ns Instruction Time 3.3 V Open Architecture Extensible to Voice Over IP and Other.

CS494003 : Audio DSPs. Multi-standard Audio Decoder.

DSP24 : Ultra-high Performance Digital Signal Processor. Scalable DSP Logic Control Memory A Memory B 24 Imag 80/100 MHz operation on an unlimited array size, with support for 2-D and 3-D signal/image processing. Supports DSP, Complex math, Matrix math, FIRs, Block Adds, Subtracts, Complex magnitude, etc. 100 MHz execution speed allows a complex sample rate of 50 MHz for a 1K complex FFT, with a window included.

DSP56855 : 16-bit Digital Signal Processor. 120 MIPS x 16-bit Program SRAM x 16-bit Data SRAM x 16-bit Boot ROM Two (2) Serial Communication Interfaces (SCI) General Purpose 16-bit Quad Timer with 1 external pin JTAG/Enhanced On-Chip Emulation (OnCETM) for unobtrusive, real-time debugging Computer Operating Properly (COP)/Watchdog Timer Time-of-Day (TOD) 100 LQFP package to 18 GPIO Access to 2M words.

TMS320F241 : TMS320 Family. DSP Controller. D High-Performance Static CMOS Technology D Includes the TMS320C2xx Core CPU Object-Compatible With the TMS320C2xx Source-Code-Compatible With TMS320C25 Upwardly Compatible With 50-ns Instruction Cycle Time Commercial and Industrial Temperature Available Memory 544 Words x 16 Bits of On-Chip Data/Program Dual-Access RAM (DARAM) 8K Words.

TMS320LBC53SPZ : TMS320 Family->TMS320C5X Fixed Point DSP. ti TMS320LBC53S, Digital Signal Processor.

TMS320LC206PZ80 : TMS320 Family->TMS320C20X Family. ti TMS320LC206, Digital Signal Processor.

TMS320LF2402PG : DSP Controllers. 33-ns Instruction Cycle Time (30 MHz) 30 MIPS Performance Low-Power 3.3-V Design Based on T320C2xx DSP CPU Core Code-Compatible With 'F243/'F241/'C242 Instruction Set and Module Compatible With 'F240/'C240 Source-Code-Compatible With TMS320C1x/2x Flash (LF) and ROM (LC) Device Options 'LC2404, 'LC2402 On-Chip Memory to 32K Words x 16 Bits.

TMS320VC5409 : 320 Family. Fixed-point Digital Signal Processor. Separate 16-Bit Data Memory Buses and One Program Memory Bus 40-Bit Arithmetic Logic Unit (ALU), Including a 40-Bit Barrel Shifter and Two Independent 40-Bit Accumulators 17-Bit Parallel Multiplier Coupled a 40-Bit Dedicated Adder for Non-Pipelined Single-Cycle Multiply/Accumulate (MAC) Operation Compare, Select, and Store Unit (CSSU) for the Add/Compare.

TMS320VC5510AGGW1 : TMS320 Family. ti TMS320VC5510, Digital Signal Processor. PRODUCTION DATA information is current as of publication date. Products conform to s per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,.

Z87000 : Spread Spectrum Controller. 16.384 Mhz, 12 Kwords ROM, 512 Words RAM, 32 I/O, 4.5V to 5.5V.

dsPIC30F1010 : High-Performance Modified RISC CPU: Modified Harvard architecture C compiler optimized instruction set architecture 83 base instructions with flexible addressing modes 24-bit wide instructions, 16-bit wide data path 12 Kbytes on-chip Flash program space 512 bytes on-chip data RAM 16 x 16-bit working register array Up to 30 MIPs operation:.

MC56F8025PB : The 56F8025 is a member of the 56800E core-based family of Digital Signal Controllers (DSCs). It combines, on a single chip, the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals to create an extremely cost-effective solution. Because of its low cost, configuration flexibility, and compact program.

TMS320F28335 : Digital Signal Controller The TMS320F28335, TMS320F28334, and TMS320F28332, devices, members of the TMS320C28x DSC generation, are highly integrated, high-performance solutions for demanding control applications..

ADSP-BF514 : Low Power Blackfin With Consumer Devices Connectivity The Blackfin processor family is extended further into the portable market with the availability of an on chip removable storage interface including SDIO, CE-ATA and eMMC. The high performance 16/32-bit Blackfin embedded processor core, the flexible cache architecture, the enhanced DMA subsystem,.

 
0-C     D-L     M-R     S-Z