Details, datasheet, quote on part number: TMS320F206PZ
CategorySemiconductors => Processors => Other Processors
Part familyTMS320F206 Digital Signal Processor
TitleTMS320 Family->TMS320C20X Family
DescriptionDigital Signal Processor 100-LQFP 0 to 70
CompanyTexas Instruments, Inc.
ROHSNot Compliant
DatasheetDownload TMS320F206PZ datasheet
Find where to buy
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
100PZLQFPS-PQFP-GTMS320F206PZ 14141.4.5
Application notes
• Using Triple Read and Boost Algorithm Code to Enhance Adequate Prog Margin
This addendum to the TMS320F20x/F24x DSP Embedded Flash Memory Technical Reference (SPRU282) describes the triple read and boost operation of the embedded Flash EEPROM module on the TMS320F20x digital signal processor (DSP) devices to enhance the programmi | Doc


Features, Applications

High-Performance Static CMOS Technology Includes the T320C2xLP Core CPU is a Member of the TMS320C20x Generation, Which Also Includes the TMS320C203, and TMS320C209 Devices Instruction-Cycle Time 5 V Source Code Compatible With TMS320C25 Upwardly Code-Compatible With TMS320C5x Devices Three External Interrupts TMS320F206 Integrated Memory: Words of On-Chip Dual-Access Data RAM 16 Words of On-Chip Flash Memory (EEPROM) 16 Words of On-Chip Single-Access Program/ Data RAM 16-Bit Maximum Addressable External Memory Space 64K Program 64K Data 64K Input/Output (I/O) 32K Global

32-Bit ALU / Accumulator 16-Bit Multiplier With a 32-Bit Product Block Moves from Data and Program Space TMS320F206 Peripherals: On-Chip 16-Bit Timer On-Chip Software-Programmable Wait-State to 7) Generator On-Chip Oscillator On-Chip Phase-Locked Loop (PLL) Six General-Purpose I/O Pins Full-Duplex Asynchronous Serial Port (UART) Enhanced Synchronous Serial Port (ESSP) With Four-Level-Deep FIFOs Input Clock Options Options Multiply-by-One, -Two, or -Four and Divide-by-Two Support of Hardware Wait States Power Down IDLE Mode IEEE 1149.1-Compatible Scan-Based Emulation 100-Pin Thin Quad Flat Package (TQFP) (PZ Suffix)


The TMS320F206 Texas Instruments (TITM) digital signal processor (DSP) is fabricated with static CMOS integrated-circuit technology, and the architectural design is based upon that of the TMS320C20x series, optimized for low-power operation. The combination of advanced Harvard architecture, on-chip peripherals, on-chip memory, and a highly specialized instruction set is the basis of the operational flexibility and speed of the 'F206. The 'F206 offers these advantages:

32K 16 words on-chip flash EEPROM reduces system cost and facilitates prototyping Enhanced TMS320 architectural design for increased performance and versatility Advanced integrated-circuit processing technology for increased performance 'F206 devices are pin- and code-compatible with 'C203 devices. Source code for the 'F206 DSP is software-compatible with the 'C1x and 'C2x DSPs and is upwardly compatible with fifth-generation DSPs ('C5x) New static-design techniques for minimizing power consumption and increasing radiation tolerance

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. is a trademark of Texas Instruments Incorporated. IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Table 1 shows the capacity of on-chip RAM and ROM, the number of serial and parallel I/O ports, the execution time of one machine cycle, and the type of package with total pin count of the TMS320F206 device. Table 1. Characteristics of the TMS320F206 Processor


TERMINAL NAME NO. A1 A0 TYPE DESCRIPTION DATA AND ADDRESS BUSES Parallel data bus D15 [most significant bit (MSB)] through D0 [least significant bit (LSB)]. D15D0 are used to transfer data between the TMS320F206 and external data / program memory / O devices. Placed in the high-impedance state when not outputting / W high) or RS when asserted. They go into the high-impedance state when OFF is active low.

Parallel address bus A15 (MSB) through A0 (LSB). A15A0 are used to address external data / program memory / O devices. These signals go into the high-impedance state when OFF is active low.

MEMORY CONTROL SIGNALS 51 52 O/Z Program-select signal. PS is always high unless low-level asserted for communicating to off-chip program space. PS goes into the high-impedance state when OFF is active low. Data-select signal. DS is always high unless low-level asserted for communicating to off-chip program space. DS goes into the high-impedance state when OFF is active low. / O space-select signal. IS is always high unless low-level asserted for communicating to I/O ports. IS goes into the high-impedance state when OFF is active low. Data-ready input. READY indicates that an external device is prepared for the bus transaction to be completed. If the external device is not ready (READY low), the TMS320F206 waits one cycle and checks READY again. If READY is not used, it should be pulled high. Read / write signal. / W indicates transfer direction when communicating with an external device. R/W is normally in read mode (high), unless low level is asserted for performing a write operation. / W goes into the high-impedance state when OFF is active low. Read-select indicates an active, external read cycle. RD is active on all external program, data, and / O reads. RD goes into the high-impedance state when OFF is active low. The function of the RD pin can be programmed to provide an inverted R/W signal instead of RD. The FRDN bit (bit 15) in the PMST register controls this selection.

I = input, O = output, Z = high impedance, PWR = power, GND = ground


Related products with the same datasheet
Some Part number from the same manufacture Texas Instruments, Inc.
TMS320F206PZA ti TMS320F206, Digital Signal Processor
TMS320F240 DSP Controllers
TMS320F240PQ ti TMS320F240, 16-bit, 5V Fixed Point DSP With Flash
TMS320F241 DSP Controller
TMS320F241FN ti TMS320F241, 16-bit , 5V Fixed Point DSP With Flash
TMS320F241PGE DSP Controllers
TMS320F241PGS ti TMS320F241, 16-bit , 5V Fixed Point DSP With Flash
TMS320F243 DSP Controller
TMS320F243FN DSP Controllers
TMS320F243PGE ti TMS320F243, 16-bit, 5V Fixed Point DSP With Flash
TMS320F2801 32-Bit Digital Signal Controller With Flash
TMS320F2810PBKA ti TMS320F2810, Digital Signal Processor
TMS320F2811 32-Bit Digital Signal Controller With Flash
TMS320F2811PBKA Floating-point Digital Signal Processors
TMS320F2811PBKQ 32-Bit Digital Signal Controller With Flash
TMS320F2812GHHA ti TMS320F2812, Digital Signal Processor
Same catergory

ADSP-21060 : 320 Family. Sharc, 40 Mhz, 120 Mflops, 5v, Floating Point. SUMMARY High Performance Signal Processor for Communications, Graphics and Imaging Applications Super Harvard Architecture Four Independent Buses for Dual Data Fetch, Instruction Fetch and Nonintrusive I/O 32-Bit IEEE Floating-Point Computation Units-- Multiplier, ALU, and Shifter Dual-Ported On-Chip SRAM and Integrated I/O Peripherals--A Complete System-On-A-Chip.

ADSP-21060C : 320 Family. High Performance Signal Processor For Communica- Tions,graphics,and Imaging Applications.

DPS9455B : The DPS 9455B is a Single-chip Digital Displayprocessor And Scaler, Especiallydesigned For Fpd-tv Sets (LCD-TV, Pdptv)supporting HDTV Signal Input And Deinterlacingas Well as Pc-signal Input. Thedps 9455B is a New Member of Micronas IC Family Implemented in Deep Submicroncmos Technology..

DS2164Q : -.

G65SC151 : Adv-cmos Communications Terminal Unit.

LSI403Z : . LSI403Z Digital Signal Processor Z S P TM A R C H I T E C T U R E P E R F O R M A N C E W I T H H I G H - E N D I N T E G R AT I O N OVERVIEW The LSI403Z is a low power 16-bit fixed-point digital signal processor (DSP) based on the LSI Logic ZSP400 DSP core. The device has been designed for applications requiring high throughput and flexibility coupled.

PATHFINDER-2 : DSP Block. High Performance Vector Processing Chip. Applications Communications Digital filtering Correlations and convolutions Imaging processing Instrumentation Polyphase filtering Pulse compression Radar/sonar signal processing SAR processing Signal intelligence Spectrum analysis Key MHz clock 5.3 GFLOPS 4.26 GByte/sec sustainable memory bandwidth 3.3V I/O, 2.5V core Synchronous system design 0.25.

PDSP16256 : Digital Filtering. = Programmable FIR Filter ;; Package Type = Pga ;; No. Of Pins = 144.

PDSP16350B0 : Waveform Generation and Modulation. = I/q Splitter/nco ;; Package Type = Pga ;; No. Of Pins = 84.

SMJ320C25 : TMS320 Family. or 80-ns Instruction Cycle Times 544 Words of Programmable On-Chip Data RAM 4K Words of On-Chip Program ROM 128K Words of Data/Program Space 16 Input and 16 Output Channels 16-Bit Parallel Interface Directly Accessible External Data Memory Space Global Data Memory Interface 16-Bit Instruction and Data Words 16-Bit Multiplier With a 32-Bit Product.

T8301 : DSP Block. Internet Protocol Telephone Phone-on-a-chip ip Solution DSP.

TMS320C10FNA : TMS320 Family->TMS320C1X Fixed Point DSP. ti TMS320C10, Digital Signal Processor.

TMS320C52PJ : TMS320 Family->TMS320C5X Fixed Point DSP. ti TMS320C52, Digital Signal Processors.

TMS320F240 : TMS320 Family. DSP Controllers. D High-Performance Static CMOS Technology D Includes the T320C2xLP Core CPU Object Compatible With the TMS320C2xx Source Code Compatible With TMS320C25 Upwardly Compatible With 132-Pin Plastic Quad Flat Package (PQ Suffix) 50-ns Instruction Cycle Time Industrial and Automotive Temperature Available Memory 544 Words 16 Bits of On-Chip Data/Program.

TMS320P14FNL : TMS320 Family->TMS320C1X Fixed Point DSP. ti TMS320P14, Digital Signal Processors.

TMS320VC5503 : Fixed-point Digital Signal Processorthe TMS320VC5503 Fixed-point Digital Signal Processor (DSP) is Based on The TMS320C55x DSP Generation Cpu Processor Core. The C55x DSP Architecture Achieves High Performance And Low Power Through Increased Parallelism And Total Focus on Reduction in Power Dissipation. The Cpu Supports an Internal Bus Structure That.

ADSP-BF514 : Low Power Blackfin With Consumer Devices Connectivity The Blackfin processor family is extended further into the portable market with the availability of an on chip removable storage interface including SDIO, CE-ATA and eMMC. The high performance 16/32-bit Blackfin embedded processor core, the flexible cache architecture, the enhanced DMA subsystem,.

ADSP-BF547 : High Performance Convergent Multimedia Blackfin Processor The ADSP-BF547 processors were specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip.

TMS320TCI6602 : Multicore Fixed And Floating-Point Digital Signal Processor The TCI6602 Multicore Fixed and Floating Point Digital Signal Processor is based on TI\'s KeyStone multicore architecture. Integrated with two C66x CorePac DSPs, each core runs at 1.0 to 1.25 GHz enabling up to 2.5 GHz. The device supports high-performance signal processing applications such.

0-C     D-L     M-R     S-Z