|Category||Communication => Telephony => Voice Processors|
|Description||Digital Signal Processors|
|Company||Texas Instruments, Inc.|
|Datasheet||Download TMS320FN datasheet
80-ns Instruction Cycle Time 544 Words of On-Chip Data RAM 4K Words of On-Chip Secure Program EPROM (TMS320E25) 4K Words of On-Chip Program ROM (TMS320C25) 128K Words of Data/Program Space 32-Bit ALU/Accumulator × 16-Bit Multiplier With a 32-Bit Product Block Moves for Data/Program Management Repeat Instructions for Efficient Use of Program Space Serial Port for Direct Codec Interface Synchronization Input for Synchronous Multiprocessor Configurations Wait States for Communication to Slow Off-Chip Memories/Peripherals On-Chip Timer for Control Operations Single 5-V Supply Packaging: 68-Pin PGA, PLCC, and CER-QUAD 68-to-28 Pin Conversion Adapter Socket for EPROM Programming Commercial and Military Versions Available NMOS Technology: TMS32020. 200-ns cycle time CMOS Technology: TMS320C25. 100-ns cycle time TMS320E25. 100-ns cycle time TMS320C25-50. 80-ns cycle timedescription
This data sheet provides complete design documentation for the second-generation devices of the TMS320 family. This facilitates the selection of the devices best suited for user applications by providing all specifications and special features for each TMS320 member. This data sheet is divided into four major sections: architecture, electrical specifications (NMOS and CMOS), timing diagrams, and mechanical data. In each of these sections, generic information is presented first, followed by specific device information. An index is provided for quick reference to specific information about a device.
ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice.
FUNCTION A10 A11 PIN K7/38 L8/39 FUNCTION A14 A15 BIO BR PIN B7/68 G11/50 FUNCTION D12 D13 PIN A4/5 B5/4 FUNCTION DS DX FSR FSX HOLD HOLDA IACK INT0 INT1 PIN G1/20 G2/21 FUNCTION INT2 IS PIN H1/22 FUNCTION VCC VSS X1 X2/CLKIN PIN G10/51 F11/52
On the TMS32020, MP/MC must be connected to VCC. SIGNALS VCC VSS D15-D0 A15-A0 PS, DS, IS R/W STRB RS INT2-INT0 MP/MC MSC IACK READY BR XF HOLD HOLDA SYNC BIO DR CLKR FSR DX CLKX FSX I/O/Z O/Z I I/O/Z DEFINITION 5-V supply pins Ground pins Output from internal oscillator for crystal Input to internal oscillator from crystal or external clock Master clock output (crystal or CLKIN frequency/4) A second clock output signal 16-bit data bus D15 (MSB) through D0 (LSB). Multiplexed between program, data, and I/O spaces. 16-bit address bus A15 (MSB) through A0 (LSB) Program, data, and I/O space select signals Read/write signal Strobe signal Reset input External user interrupt inputs Microprocessor/microcomputer mode select pin Microstate complete signal Interrupt acknowledge signal Data ready input. Asserted by external logic when using slower devices to indicate that the current bus transaction is complete. Bus request signal. Asserted when the TMS320C2x requires access to an external global data memory space. External flag output (latched software-programmable signal) Hold input. When asserted, TMS320C2x goes into an idle mode and places the data, address, and control lines in the high impedance state. Hold acknowledge signal Synchronization input Branch control input. Polled by BIOZ instruction. Serial data receive input Clock for receive input for serial port Frame synchronization pulse for receive input Serial data transmit output Clock for transmit output for serial port Frame synchronization pulse for transmit. Configuration as either an input or an output.
The TMS320 family of 16/32-bit single-chip digital signal processors combines the flexibility of a high-speed controller with the numerical capability of an array processor, thereby offering an inexpensive alternative to multichip bit-slice processors. The highly paralleled architecture and efficient instruction set provide speed and flexibility to produce a MOS microprocessor family that is capable of executing more than 12.5 MIPS (million instructions per section). The TMS320 family optimizes speed by implementing functions in hardware that other processors implement through microcode or software. This hardware-intensive approach provides the design engineer with processing power previously unavailable on a single chip. The TMS320 family consists of three generations of digital signal processors. The first generation contains the TMS32010 and its spinoffs. The second generation includes the TMS32020, TMS320C25, and TMS320E25, which are described in this data sheet. The is a floating-point DSP device designed for even higher performance. Many features are common among the TMS320 processors. Specific features are added in each processor to provide different cost/performance tradeoffs. Software compatibility is maintained throughout the family to protect the user's investment in architecture. Each processor has software and hardware tools to facilitate rapid design.
The TMS32010, the first NMOS digital signal processor in the TMS320 family, was introduced in 1983. Its powerful instruction set, inherent flexibility, high-speed number-crunching capabilities, and innovative architecture have made this high-performance, cost-effective processor the ideal solution to many telecommunications, computer, commercial, industrial, and military applications. Since that time, the TMS320C10, a low-power CMOS version of the industry-standard TMS32010, and other spinoff devices have been added to the first generation of the TMS320 family. The second generation of the TMS320 family (referred as TMS320C2x) includes four members, the TMS320C25, TMS320C25-50, and TMS320E25. The architecture of these devices is based upon that of the TMS32010. The TMS32020, processed in NMOS technology, is source-code compatible with he TMS32010 and in many applications is capable of two times the throughput of the first-generation devices. Its enhanced instruction set (109 instructions), large on-chip data memory (544 words), large memory spaces, on-chip serial port, and hardware timer make the TMS32020 a powerful addition to the TMS320 family. The TMS320C25 is the second member of the TMS320 second generation. It is processed in CMOS technology, is capable of an instruction cycle time of 100 ns, and is pin-for-pin and object-code compatible with the TMS32020. The TMS320C25's enhanced feature set greatly increases the functionality of the device over the TMS32020. Enhancements included 24 additional instructions (133 total), eight auxiliary registers, an eight-level hardware stack, 4K words of on-chip program ROM, a bit-reversed indexed-addressing mode, and the low-power dissipation inherent to the CMOS process. An extended-temperature range version (TMS320C25GBA) is also available. The is a high-speed version of the It is capable of an instruction cycle time of less than 80 ns. It is architecturally identical to the original 40-MHz version of the TMS320C25 and, thus, is pin-for-pin and object-code compatible with the TMS320C25. The TMS320E25 is identical to the TMS320C25, with the exception that the on-chip 4K-word program ROM is replaced with a 4K-word on-chip program EPROM. On-chip EPROM allows realtime code development and modification for immediate evaluation of system performance.
|Some Part number from the same manufacture Texas Instruments, Inc.|
|TMS320FZ Digital Signal Processors|
|TMS320LBC51 Tms320c5x Fixed Point DSP|
|TMS320LBC51PQ57 ti TMS320LBC51, Digital Signal Processors|
|TMS320LBC52 Tms320c5x Fixed Point DSP|
|TMS320LBC52PJ ti TMS320LBC52, Digital Signal Processors|
|TMS320LBC53 Tms320c5x Fixed Point DSP|
|TMS320LBC53PQ ti TMS320LBC53, TMS320LBC53|
|TMS320LBC53S Tms320c5x Fixed Point DSP|
|TMS320LBC53SPZ ti TMS320LBC53S, Digital Signal Processor|
|TMS320LBC56 Tms320c5x Fixed Point DSP|
|TMS320LBC56PZ57 ti TMS320LBC56, Digital Signal Processors|
|TMS320LBC57 Tms320c5x Fixed Point DSP|
|TMS320LBC57PBK57 ti TMS320LBC57, Digital Signal Processor|
|TMS320LC15 Tms320c1x Fixed Point DSP|
|TMS320LC15FNL ti TMS320LC15, Digital Signal Processors|
|TMS320LC17 Floating-point Digital Signal Processors|
|TMS320LC203 Tms320c2xx Fixed Point DSP|
|TMS320LC203PZ ti TMS320LC203, Digital Signal Processor|
|TMS320LC206 Digital Signal Processors|
2745AF : Magnetics. T1/E1 Transformer, High Freq T1/E1. Operates as a line-interface pulse transformer in DS1 and CEPT applications Contains specific interwinding insulation to minimize capacitance Winding (3-2)(2-1) is highly balanced Designed for automatic machine placement into printed wiring boards Only difference between the 2745AF and 2745AF2 is the terminal length Reliability testing: Shock, vibration,.
82430FX : Databus ICs. Pciset , System Controller (tsc) And Data Path Unit (tdp).
HC1773 : Dual Rate 1773 Fiber Optic Transceiver. Fabricated with RICMOSTM IV Bulk CMOS 0.8 µm Process (Leff = 0.65 µm) CMOS Compatible I/O Single + 10% Power Supply 20Mbps 1773 format The HC1773 chip is intended to be used in a hybrid package with a photo diode, a transimpedance amplifier, a crystal and an LED or laser diode. Interfacing is intended to be via a protocol chip. Information is transmitted.
HC5517BCB : Low Cost 3 Ren Ringing Slic For Isdn Modem/ta And WL. The HC5517B low cost, 3 REN ringing SLIC is designed to accommodate a wide variety of short loop applications and provides the same degree of flexibility as the high performance HC5517. The flexible include open circuit tip to ring DC voltages, user defined ringing waveforms, ring trip detection thresholds, and loop current limits that can be tailored.
MAX3892 : +3.3V, 2.5Gbps/2.7Gbps, Sdh/sonet 4:1 Serializer With Clock Synthesis.
MC6850 : Asynchronous Communications Interface Adapter.
MK2731-03C : Mpeg Audio Clock Synthesizer. The is a low cost, low jitter, high performance PLL clock synthesizer designed to replace oscillators and PLL circuits in set-top box and multimedia systems. Using our proprietary analog Phase-Locked Loop (PLL) techniques, the device uses an inexpensive crystal or clock input to produce up to three output clocks. All of the audio frequencies are synthesized.
OL6201N-5-A10 : Service Channel FP Laser Module ( 1625 Nm, 5 MW ). Oki Semiconductor's OL6201N-5-A10 dual in-line package laser diode module a cooled 1625nm laser diode coupled to a single-mode fiber. The OL6201N-5-A10 has built-in thermoelectric cooler and is equipped with a monitor photodiode. 1625-nm MQW FP Laser Single-mode fiber Built-in thermoelectric cooler 5-mW fiber output power Includes a photodiode for power.
S2009 : Serial Backplane/Crosspoint Switches. 1.6 GBPS Quad Serial Backplane Device.
SBL82314x : Classic Bi-directional Components For Full-duplex Two-way Single Fiber Communication.
SLK2511IPZP : ti SLK2511, OC-48,24,12 Sonet SDH Multi-rate Transceiver. Support Clock/Data Recovery and Multiplexer/Demultiplexer Functions Supports OC-24, OC-12, Gigabit Ethernet, and OC-3 Data Rate With Autorate Detection Supports Transmit Only, Receiver Only, Transceiver and Repeater Functions in a Single Chip Through Configuration Pins Supports SONET/SDH Frame Detection On-Chip PRBS Generation and Verification Supports.
TDA9109SN : Low-cost Deflection Processor For Multisync Monitors. I2C GEOMETRY CORRECTIONS VERTICAL PARABOLA GENERATOR (Pin Cushion - E/W, Keystone, Corner) HORIZONTAL DYNAMIC PHASE (Side Pin Balance & Parallelogram) VERTICAL DYNAMIC FOCUS (Vertical Focus Amplitude) GENERAL SYNC PROCESSOR 12V SUPPLY VOLTAGE 8V REFERENCE VOLTAGE HOR. & VERT. LOCK/UNLOCK OUTPUTS READ/WRITE I 2C INTERFACE HORIZONTAL AND VERTICAL MOIRE.
TLK3104SC : . Data Throughput Support Transmit Only, Receiver Only, Transceiver and Repeater Functions in a Single Chip Through Configuration Pins Selectable Independent Channel or Channel Sync Operation On-Chip Termination for LVDS and PECL Compatible Interface On-Chip 8-Bit/10-Bit Coding Hot Plug Protection Interfaces to Backplane, Copper Cables, or Optical Modules.
VSC830 : Crosspoint Switches. 2.7Gb/s Dual 2X2 Crosspoint Switch With Integrated Signal Equalization.