|Category||Communication => Network => Network Processors|
|Description||32 Channel (1 T1/E1) CESoP Processor with single Ethernet interface
The ZL50115 CESoP processor is a highly functional TDM to Packet bridging device providing both structured and unstructured circuit emulation services (CES) for T1 and E1 streams across a packet network based on MPLS, IP or Ethernet. The device incorporates a range of powerful clock recovery mechanisms for each TDM stream and an Ethernet interface for data traffic uplink.
Circuit Emulation Services over Packet (CESoP) transport for MPLS, IP and Ethernet networks
On-chip timing & synchronization recovery across a packet network
On-chip dual reference Stratum 3 DPLL
Grooming capability for Nx64 kbps trunking
Fully compatible with Zarlink's ZL50110, ZL50111 and ZL50114 CESoP processors
TDM Interface provides 32 bi-directional 64 Kbps channels or 1 T1/E1 port
Compatible with H.110, H-MVIP, ST-BUS backplane
Direct connection to LIUs, framers, backplanes
100 Mbps MII FE or 1000 Mbps GMII/TBI interface for network uplink
Flexible, multi-protocol packet encapsulation including IPv4, IPv6, RTP, MPLS, L2TPv3, ITU-T Y.1413, IETF CESoPSN, IETF SAToP and user programmable
Complies with ITU-T recommendation Y.1413, IETF PWE3 draft standards CESoPSN and SAToP and CES draft IAs from MEF and MFA
On-chip packet memory with 128 ms jitter buffer
TDM traffic over packet networks
Leased Line support over packet networks
TDM over Cable
TDM over WiFi (802.11x)
TDM over WiMAX (802.16)
FTTx (Fibre To The Premises)
G/E PON (Passive Optical Networks)
Layer 2 VPN services
Customer-premise and Provider Edge Routers and Switches
Ethernet and IP based IADs
IP DSLAM, NG-DLC
|Datasheet||Download ZL50115 datasheet
General Circuit Emulation Services over Packet (CESoP) transport for MPLS, IP and Ethernet networks On chip timing & synchronization recovery across a packet network On chip dual reference Stratum 3 DPLL Grooming capability for Nx64 Kbps trunking Fully compatible with Zarlink's ZL50110, ZL50111 and ZL50114 CESoP processors
Circuit Emulation Services Complies with ITU-T recommendation Y.1413 Complies with IETF PWE3 draft standards CESoPSN and SAToP Complies with CESoP Implementation Agreements from MEF 8 and MFA 8.0.0 Structured, synchronous CESoP Unstructured, asynchronous CESoP with integral per-stream clock recovery
Customer Side Packet Interfaces 100 Mbps MII Fast Ethernet (ZL50118/19/20 only) (may also be used as a second provider side packet interface) Provider Side Packet Interfaces 100 Mbps MII Fast Ethernet or 1000 Mbps GMII/TBI Gigabit Ethernet
System Interfaces Flexible 32 bit Motorola host interface On-chip packet memory with jitter buffer compensation for over ms of packet delay variation
Customer Side TDM Interfaces 1 STS-1 ports H.110, H-MVIP, ST-BUS backplane to 128 bi-directional 64 Kbps channelsPW, RTP, UDP, IPv4, IPv6, MPLS, ECID, VLAN, User Defined, Others
(Jitter Buffer Compensation for ms of Packet Delay Variation) Dual Reference Stratum 3 DPLL Host Processor Interface
Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2004-2005, Zarlink Semiconductor Inc. All Rights Reserved.100 Mbps MII Fast Ethernet or 1000 Mbps GMII/TBI Gigabit Ethernet
Flexible, multi-protocol packet encapsulation including IPv4, IPv6, RTP, MPLS, L2TPv3, ITU-T Y.1413, IETF CESoPSN, IETF SAToP and user programmable Packet re-sequencing to allow lost packet detection and re-ordering Four classes of service with programmable priority mechanisms (WFQ and SP) using egress queues Programmable classification of incoming packets at layers 2 through 5 Wire speed processing of all packets regardless of classification providing low latency Supports to 128 separate CESoP connections across the Packet Switched NetworkApplications
Circuit Emulation Services over Packet Networks Leased Line support over packet networks TDM over Cable TDM over WiFi (802.11x) TDM over WiMAX (802.16) Fibre To The Premises G/E-PON Layer 2 VPN servicesCustomer-premise and Provider Edge Routers and Switches Ethernet and IP based IADs
The following table captures the changes from the November 2004 issue. Page 38 Section 4.6.1 Item Change Added 5 kohm pulldown recommendation to GPIO signals.
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