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This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.0 / May 2009 1

Revision No. 0.1 1.0 First version Release History Draft Date Feb. 2009 May 2009 Remark
DESCRIPTION

The a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. This Hynix 128Mb DDR SDRAMs offer fully synchronous operations referenced

Part numberCircuit descriptionManufacture
H5DU1262GTR-E3 8M X 16 DDR DRAM, PDSO66. Specifications: Memory Category: DRAM Chip ; Density: 134218 kbits ; Number of Words: 8000 k ; Bits per Word: 16 bits ; Package Type: TSOP, 0.400 INCH, ROHS COMPLIANT, TSOP2-66 ; Pins: 66 ; Logic Family:
Category: Memory - Memory Chips
SK Hynix
H5DU1262GTR-E3I - -
H5DU1262GTR-E4 - -
H5DU1262GTR-E4I - -
H5DU1262GTR-FA - -
H5DU1262GTR-FAI - -
H5DU1262GTR-FB - -
H5DU1262GTR-FBI - -
H5DU1262GTR-J3 - -
H5DU1262GTR-J3I - -
H5DU1262GTR-K2 - -
H5DU1262GTR-K2I - -
H5DU1262GTR-K3 - -
H5DU1262GTR-K3I - -

 

 
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